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Message-ID: <Y8DVPvnfShdhlVHh@gondor.apana.org.au>
Date: Fri, 13 Jan 2023 11:51:26 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: Samuel Holland <samuel@...lland.org>
Cc: Corentin Labbe <clabbe.montjoie@...il.com>,
"David S . Miller" <davem@...emloft.net>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Albert Ou <aou@...s.berkeley.edu>,
Conor Dooley <conor@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-sunxi@...ts.linux.dev
Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for
D1
On Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland wrote:
> D1 has a crypto engine similar to the one in other Allwinner SoCs.
> Like H6, it has a separate MBUS clock gate.
>
> It also requires the internal RC oscillator to be enabled for the TRNG
> to return data, presumably because noise from the oscillator is used as
> an entropy source. This is likely the case for earlier variants as well,
> but it really only matters for H616 and newer SoCs, as H6 provides no
> way to disable the internal oscillator.
>
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
> I noticed that the vendor driver has code to explicitly enable IOSC when
> using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
> a different binding/driver in mainline.
>
> Changes in v2:
> - Add TRNG clock
>
> .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
> 1 file changed, 25 insertions(+), 8 deletions(-)
This doesn't have an ack from Rob Herring. Would you like me
to apply just the crypto patch by itself?
Thanks,
--
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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