linux-kernel - Re: [PATCH v3 2/2] dt-bindings: mailbox: add Marvell MHU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <405c2e98-ce26-becb-23c1-dccc6a588167@linaro.org>
Date:   Fri, 13 Jan 2023 14:02:02 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Wojciech Zmuda <wzmuda@...vell.com>, linux-kernel@...r.kernel.org
Cc:     jassisinghbrar@...il.com, robh+dt@...nel.org, sgoutham@...vell.com,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v3 2/2] dt-bindings: mailbox: add Marvell MHU

On 13/01/2023 13:53, Wojciech Zmuda wrote:
> Marvell Message Handling Unit is a mailbox controller present in
> Marvell OcteonTx and OcteonTX2 SoC family.
> 
> Signed-off-by: Wojciech Zmuda <wzmuda@...vell.com>
> ---
>  .../bindings/mailbox/marvell,mhu.yml          | 59 +++++++++++++++++++
>  MAINTAINERS                                   |  1 +
>  2 files changed, 60 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
> 
> diff --git a/Documentation/devicetree/bindings/mailbox/marvell,mhu.yml b/Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
> new file mode 100644
> index 000000000000..3fe8238eefe7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/marvell,mhu.yml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mailbox/marvell,mhu.yml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell Message Handling Unit
> +
> +maintainers:
> +  - Sujeet Baranwal <sbaranwal@...vell.com>
> +  - Sunil Goutham <sgoutham@...vell.com>
> +  - Wojciech Bartczak <wbartczak@...vell.com>
> +
> +description:
> +  The Control-Processors Cluster (CPC) provides Arm-platform specification
> +  entities for managing the system. One of the CPC processors is the System
> +  Control Processor (SCP). The SCP is responsible, among others, for booting
> +  the chip, clock and power initialization, controlling power consumption
> +  through DVFS, monitoring temperature sensors and controlling AVS. The SCP,
> +  as each XCP, contains mailboxes for software-to-software communications.
> +  Mailbox writes cause an interrupt to the local XCP core or to the AP.
> +  This driver exposes AP-SCP Message Handling Unit to the system, providing
> +  the mailbox communication mechanism to the system, with the intention
> +  of plugging into the SCMI framework. It is designed to work with Marvell
> +  OcteonTX and OcteonTX2-based platforms.
> +  Mailbox has no other usage than SCMI communication. In case of
> +  configurations running without SCMI support it should be disabled.
> +
> +properties:
> +  compatible:
> +    oneOf:

This is not oneOf...

> +      - items:

And you have just one item...

> +        - enum:

And wrong indentation below, so this was not tested. Please do not send
untested code.

> +          - marvell,octeontx-mhu
> +          - marvell,octeontx2-mhu
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#mbox-cells":
> +    description: Index of the channel
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#mbox-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    / {

Why this is needed?

> +        mailbox: mailbox {

unit address is still wrong.


> +            compatible = "marvell,octeontx2-mhu";
> +            reg = <0xe000 0 0 0 0>; /* DEVFN = 0xe0 (1c:0) */
> +            #mbox-cells = <1>;
> +    };
> +

And this DTS code should not be sent... it wasn't ever compiled.

Best regards,
Krzysztof