lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <MN0PR12MB6101E79DA61CB0154C4819B2E2C19@MN0PR12MB6101.namprd12.prod.outlook.com>
Date:   Mon, 16 Jan 2023 16:22:09 +0000
From:   "Limonciello, Mario" <Mario.Limonciello@....com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Jan Dąbroś <jsd@...ihalf.com>
CC:     Borislav Petkov <bp@...en8.de>, Borislav Petkov <bp@...e.de>,
        Hans de Goede <hdegoede@...hat.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
        "jarkko.nikula@...ux.intel.com" <jarkko.nikula@...ux.intel.com>,
        "wsa@...nel.org" <wsa@...nel.org>,
        "rrangel@...omium.org" <rrangel@...omium.org>,
        "upstream@...ihalf.com" <upstream@...ihalf.com>,
        "M K, Muralidhara" <Muralidhara.MK@....com>,
        "Chatradhi, Naveen Krishna" <NaveenKrishna.Chatradhi@....com>,
        "Ghannam, Yazen" <Yazen.Ghannam@....com>
Subject: RE: [PATCH -next 1/2] i2c: designware: Switch from using MMIO access
 to SMN access

[Public]



> -----Original Message-----
> From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> Sent: Monday, January 16, 2023 06:39
> To: Jan Dąbroś <jsd@...ihalf.com>
> Cc: Borislav Petkov <bp@...en8.de>; Limonciello, Mario
> <Mario.Limonciello@....com>; Borislav Petkov <bp@...e.de>; Hans de
> Goede <hdegoede@...hat.com>; linux-kernel@...r.kernel.org; linux-
> i2c@...r.kernel.org; jarkko.nikula@...ux.intel.com; wsa@...nel.org;
> rrangel@...omium.org; upstream@...ihalf.com; M K, Muralidhara
> <Muralidhara.MK@....com>; Chatradhi, Naveen Krishna
> <NaveenKrishna.Chatradhi@....com>; Ghannam, Yazen
> <Yazen.Ghannam@....com>
> Subject: Re: [PATCH -next 1/2] i2c: designware: Switch from using MMIO
> access to SMN access
> 
> On Mon, Jan 16, 2023 at 11:19:00AM +0100, Jan Dąbroś wrote:
> > Hi Borislav,
> >
> > > Make init_amd_nbs() arch_initcall_sync() so that it executes after PCI
> init.
> >
> > I described earlier in this thread why such option is not working -
> > let me quote myself:
> >
> > It's not enough for running init_amd_nbs() to have only
> > pci_arch_init() done. We need the pci bus to be created and registered
> > with all devices found on the bus. We are traversing through them and
> > trying to find northbridge VID/DID. Due to the above, we need to run
> > init_amd_nbs() only after acpi_scan_init() that is invoked from
> > acpi_init() which is registered as subsys_initcall. That's why the
> > trick with switching init_amd_nbs() to arch_initcall_sync will not
> > work.
> >
> > We have a kind of chicken-and-egg problem here. Or is there something I
> missed?
> >
> > I wonder if there is upstreamable option to control order of the
> > drivers' init by forcing link order?
> 
> But what exactly do you need from North Bridge? Is it only its existence or
> do you need to have fully instantiated PCI device (if so, why?)?
> 

There is a need to be able to write and read PCI config space.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ