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Message-Id: <1673847684-31893-2-git-send-email-hongxing.zhu@nxp.com>
Date: Mon, 16 Jan 2023 13:41:11 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: l.stach@...gutronix.de, bhelgaas@...gle.com, robh+dt@...nel.org,
lorenzo.pieralisi@....com, shawnguo@...nel.org, kishon@...com,
kw@...ux.com, frank.li@....com
Cc: hongxing.zhu@....com, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...gutronix.de,
linux-imx@....com
Subject: [PATCH v5 01/14] dt-bindings: imx6q-pcie: Add i.MX8MM PCIe EP mode compatible string
Add i.MX8MM PCIe endpoint mode compatible string.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Acked-by: Rob Herring <robh@...nel.org>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index bad980902f66..6a547aabe729 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -24,6 +24,7 @@ properties:
- fsl,imx8mq-pcie
- fsl,imx8mm-pcie
- fsl,imx8mp-pcie
+ - fsl,imx8mm-pcie-ep
reg:
items:
--
2.25.1
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