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Message-ID: <109531b9-a844-d1e3-a0cc-a64fb5d35a09@arm.com>
Date: Mon, 16 Jan 2023 10:15:28 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Junhao He <hejunhao3@...wei.com>, mathieu.poirier@...aro.org,
mike.leach@...aro.org, leo.yan@...aro.org
Cc: coresight@...ts.linaro.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, anshuman.khandual@....com,
linuxarm@...wei.com, shenyang39@...wei.com,
prime.zeng@...ilicon.com
Subject: Re: [PATCH v2] coresight: etm4x: Fix accesses to TRCSEQRSTEVR and
TRCSEQSTR
On 14/01/2023 09:16, Junhao He wrote:
> The TRCSEQRSTEVR and TRCSEQSTR registers are not implemented if the
> TRCIDR5.NUMSEQSTATE == 0. Skip accessing the registers in such cases.
>
> Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver")
>
> Signed-off-by: Junhao He <hejunhao3@...wei.com>
> Reviewed-by: Mike Leach <mike.leach@...aro.org>
> Reviewed-by: Anshuman Khandual <anshuman.khandual@....com>
Queued to coresight next:
https://git.kernel.org/coresight/c/589d928248b72f8
Thanks
Suzuki
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