lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 17 Jan 2023 09:16:35 -0800
From:   Wojciech Zmuda <wzmuda@...vell.com>
To:     <linux-kernel@...r.kernel.org>
CC:     <jassisinghbrar@...il.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski@...aro.org>, <sgoutham@...vell.com>,
        <devicetree@...r.kernel.org>, Wojciech Zmuda <wzmuda@...vell.com>
Subject: [PATCH v4 2/2] dt-bindings: mailbox: add Marvell MHU

Marvell Message Handling Unit is a mailbox controller present in
Marvell OcteonTx and OcteonTX2 SoC family.

Signed-off-by: Wojciech Zmuda <wzmuda@...vell.com>
---
 .../bindings/mailbox/marvell,mhu.yaml         | 62 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 63 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/marvell,mhu.yaml

diff --git a/Documentation/devicetree/bindings/mailbox/marvell,mhu.yaml b/Documentation/devicetree/bindings/mailbox/marvell,mhu.yaml
new file mode 100644
index 000000000000..ace32a437af6
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/marvell,mhu.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/marvell,mhu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell Message Handling Unit
+
+maintainers:
+  - Sujeet Baranwal <sbaranwal@...vell.com>
+  - Sunil Goutham <sgoutham@...vell.com>
+  - Wojciech Bartczak <wbartczak@...vell.com>
+
+description:
+  The Control-Processors Cluster (CPC) provides Arm-platform specification
+  entities for managing the system. One of the CPC processors is the System
+  Control Processor (SCP). The SCP is responsible, among others, for booting
+  the chip, clock and power initialization, controlling power consumption
+  through DVFS, monitoring temperature sensors and controlling AVS. The SCP,
+  as each XCP, contains mailboxes for software-to-software communications.
+  Mailbox writes cause an interrupt to the local XCP core or to the AP.
+  This driver exposes AP-SCP Message Handling Unit to the system, providing
+  the mailbox communication mechanism to the system, with the intention
+  of plugging into the SCMI framework. It is designed to work with Marvell
+  OcteonTX and OcteonTX2-based platforms.
+  Mailbox has no other usage than SCMI communication. In case of
+  configurations running without SCMI support it should be disabled.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - marvell,octeontx-mhu
+              - marvell,octeontx2-mhu
+
+  reg:
+    maxItems: 1
+
+  "#mbox-cells":
+    description: Index of the channel
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    ecam {
+        #address-cells = <3>;
+        #size-cells = <2>;
+            mailbox: mailbox@1c,0 {
+                compatible = "marvell,octeontx2-mhu";
+                reg = <0xe000 0x0 0x0 0 0>;
+                #mbox-cells = <1>;
+            };
+    };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 650a198cce24..e53f001a15c3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11328,6 +11328,7 @@ M:	Sunil Goutham <sgoutham@...vell.com>
 M:	Wojciech Bartczak <wbartczak@...vell.com>
 L:	linux-kernel@...r.kernel.org
 S:	Maintained
+F:	Documentation/devicetree/bindings/mailbox/marvell,mvl-mhu.yml
 F:	drivers/mailbox/mvl_mhu.c
 
 MATROX FRAMEBUFFER DRIVER
-- 
2.17.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ