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Date:   Tue, 17 Jan 2023 02:51:23 +0000
From:   "Limonciello, Mario" <Mario.Limonciello@....com>
To:     Dmitry Torokhov <dmitry.torokhov@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:     Xaver Hugl <xaver.hugl@...il.com>,
        "linux-input@...r.kernel.org" <linux-input@...r.kernel.org>
Subject: RE: [PATCH] Input: i8042: Disable wake from keyboard by default on
 several AMD systems

[Public]



> -----Original Message-----
> From: Limonciello, Mario <Mario.Limonciello@....com>
> Sent: Monday, January 16, 2023 12:49
> To: Dmitry Torokhov <dmitry.torokhov@...il.com>; linux-
> kernel@...r.kernel.org
> Cc: Limonciello, Mario <Mario.Limonciello@....com>; Xaver Hugl
> <xaver.hugl@...il.com>; linux-input@...r.kernel.org
> Subject: [PATCH] Input: i8042: Disable wake from keyboard by default on several
> AMD systems
> 
> By default when the system is configured for suspend to idle by default
> the keyboard is set up as a wake source.  This matches the behavior that
> Windows uses for Modern Standby as well.
> 
> It has been reported that a variety of AMD based designs there are
> spurious wakeups are happening where two IRQ sources are active.
> 
> ```
> PM: Triggering wakeup from IRQ 9
> PM: Triggering wakeup from IRQ 1
> ```
> 
> In these designs IRQ 9 is the ACPI SCI and IRQ 1 is the PS/2 keyboard.
> An example way to trigger this is to suspend the system and then unplug
> the AC adapter.  The SOC will be in a hardware sleep state and plugging
> in the AC adapter returns control to the kernel's s2idle loop.
> 
> Normally if just IRQ 9 was active the s2idle loop would advance any EC
> transactions and no other IRQ being active would cause the s2idle loop
> to put the SOC back into hardware sleep state.
> 
> When this bug occurred IRQ 1 is also active even if no keyboard activity
> occurred. This causes the s2idle loop to break and the system to wake.
> 
> This is a platform firmware bug triggering IRQ1 without keyboard activity.
> This occurs in Windows as well, but Windows will enter "SW DRIPS" and
> then with no activity enters back into "HW DRIPS" (hardware sleep state).
> 
> This issue affects Renoir, Lucienne, Cezanne, and Barcelo based platforms
> that use LPC EC. It does not happen on newer systems such as Mendocino or
> Rembrandt.
> 
> It's been fixed in newer platform firmware, but determining whether the
> system vendor uses an LPC EC and has deployed the fix is not possible.
> 
> To avoid triggering the bug check the CPU model and adjust the policy for
> s2idle wakeup from keyboard on these systems to be disabled by default.
> 
> Users who know that their firmware is fixed and want to use wakeup from
> keyboard can manually enable wakeup from sysfs by modifying
> `/sys/bus/serio/devices/serio0/power/wakeup`.
> 
> Reported-by: Xaver Hugl <xaver.hugl@...il.com>
> Tested-by: Xaver Hugl <xaver.hugl@...il.com>
> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2115#note_1724008
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> ---

Hi,

Please disregard this patch.  In thinking about it more, I don't want to put the
workaround directly in i8042.  I am working with Xaver to test deploying the
workaround in platform/x86/amd/pmc.c instead so that we can ensure it only
runs on the firmware versions known to have the flaw and will post a new
patch when we have it working.

Thanks,

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