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Message-ID: <20230117205800.cqexxwxmtupapy7e@builder.lan>
Date: Tue, 17 Jan 2023 14:58:00 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Cc: agross@...nel.org, konrad.dybcio@...aro.org, djakov@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
benl@...areup.com, shawn.guo@...aro.org, fabien.parent@...aro.org,
leo.yan@...aro.org, dmitry.baryshkov@...aro.org,
Jun Nie <jun.nie@...aro.org>,
James Willcox <jwillcox@...areup.com>,
Joseph Gates <jgates@...areup.com>,
Max Chen <mchen@...areup.com>, Zac Crosby <zac@...areup.com>,
Vincent Knecht <vincent.knecht@...loo.org>,
Stephan Gerhold <stephan@...hold.net>
Subject: Re: [PATCH v3 5/8] arm64: dts: qcom: Add msm8939 SoC
On Tue, Jan 17, 2023 at 02:48:43AM +0000, Bryan O'Donoghue wrote:
> Add msm8939 a derivative SoC of msm8916. This SoC contains a number of key
> differences to msm8916.
>
> - big.LITTLE Octa Core - quad 1.5GHz + quad 1.0GHz
> - DRAM 1x800 LPDDR3
> - Camera 4+4 lane CSI
> - Venus @ 1080p60 HEVC
> - DSI x 2
> - Adreno A405
> - WiFi wcn3660/wcn3680b 802.11ac
>
> Co-developed-by: Shawn Guo <shawn.guo@...aro.org>
> Signed-off-by: Shawn Guo <shawn.guo@...aro.org>
> Co-developed-by: Jun Nie <jun.nie@...aro.org>
> Signed-off-by: Jun Nie <jun.nie@...aro.org>
> Co-developed-by: Benjamin Li <benl@...areup.com>
> Signed-off-by: Benjamin Li <benl@...areup.com>
> Co-developed-by: James Willcox <jwillcox@...areup.com>
> Signed-off-by: James Willcox <jwillcox@...areup.com>
> Co-developed-by: Leo Yan <leo.yan@...aro.org>
> Signed-off-by: Leo Yan <leo.yan@...aro.org>
> Co-developed-by: Joseph Gates <jgates@...areup.com>
> Signed-off-by: Joseph Gates <jgates@...areup.com>
> Co-developed-by: Max Chen <mchen@...areup.com>
> Signed-off-by: Max Chen <mchen@...areup.com>
> Co-developed-by: Zac Crosby <zac@...areup.com>
> Signed-off-by: Zac Crosby <zac@...areup.com>
> Co-developed-by: Vincent Knecht <vincent.knecht@...loo.org>
> Signed-off-by: Vincent Knecht <vincent.knecht@...loo.org>
> Co-developed-by: Stephan Gerhold <stephan@...hold.net>
> Signed-off-by: Stephan Gerhold <stephan@...hold.net>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Just to make sure when I get the question, you all co-developed this
patch, right?
> ---
> arch/arm64/boot/dts/qcom/msm8939.dtsi | 2393 +++++++++++++++++++++++++
> 1 file changed, 2393 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/msm8939.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi
> new file mode 100644
> index 0000000000000..8cd358a9fe623
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi
> @@ -0,0 +1,2393 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2020-2023, Linaro Limited
> + */
> +
> +#include <dt-bindings/clock/qcom,gcc-msm8939.h>
> +#include <dt-bindings/clock/qcom,rpmcc.h>
> +#include <dt-bindings/interconnect/qcom,msm8939.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/power/qcom-rpmpd.h>
> +#include <dt-bindings/reset/qcom,gcc-msm8939.h>
> +#include <dt-bindings/thermal/thermal.h>
> +
> +/ {
> + interrupt-parent = <&intc>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
Why do you use a default of 2? In particular since you reduce it to 1 in
/soc...
> +
> + clocks {
> + xo_board: xo-board {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <19200000>;
> + };
> +
> + sleep_clk: sleep-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + };
> + };
[..]
> + smp2p-hexagon {
To avoid having people start sending patches that changes the sort order
as soon as I merge this, could you please sort your nodes by address
(not applicable for this one), then by node name alphabetically, then by
label alphabetically.
> + compatible = "qcom,smp2p";
> + qcom,smem = <435>, <428>;
> +
> + interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
> +
> + mboxes = <&apcs1_mbox 14>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <1>;
> +
> + hexagon_smp2p_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> +
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + hexagon_smp2p_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + #address-cells = <0>;
> + #size-cells = <0>;
> + };
> + };
> +
> + memory@...00000 {
> + device_type = "memory";
> + /* We expect the bootloader to fill in the reg */
> + reg = <0x0 0x80000000 0x0 0x0>;
> + };
> +
[..]
> + soc: soc@0 {
[..]
> + pronto: remoteproc@...4000 {
> + compatible = "qcom,pronto-v2-pil", "qcom,pronto";
> + reg = <0x0a204000 0x2000>,
> + <0x0a202000 0x1000>,
> + <0x0a21b000 0x3000>;
> + reg-names = "ccu", "dxe", "pmu";
> +
> + interrupts-extended = <&intc 0 149 IRQ_TYPE_EDGE_RISING>,
> + <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
> +
> + memory-region = <&wcnss_mem>;
> +
> + power-domains = <&rpmpd MSM8939_VDDCX>,
> + <&rpmpd MSM8939_VDDMX_AO>;
The purpose of the remoteproc driver's vote is to keep the rails powered
while we're booting the remote, in the event that Linux decides to
suspend and turn of the power rails while we're waiting...
Once the remote pulls the "handover" interrupt, it signals that it has
cast the necessary votes and need no more hand-holding.
So it's unlikely that _AO is the right choice here.
> + power-domain-names = "cx", "mx";
> +
> + qcom,smem-states = <&wcnss_smp2p_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wcnss_pin_a>;
> +
> + status = "disabled";
> +
> + iris {
> + compatible = "qcom,wcn3620";
> + clocks = <&rpmcc RPM_SMD_RF_CLK2>;
> + clock-names = "xo";
> + };
> +
> + smd-edge {
> + interrupts = <GIC_SPI 142 1>;
> + qcom,ipc = <&apcs1_mbox 8 17>;
> + qcom,smd-edge = <6>;
> + qcom,remote-pid = <4>;
> +
> + label = "pronto";
> +
> + wcnss {
> + compatible = "qcom,wcnss";
> + qcom,smd-channels = "WCNSS_CTRL";
> +
> + qcom,mmio = <&pronto>;
> +
> + bluetooth {
> + compatible = "qcom,wcnss-bt";
> + };
> +
> + wifi {
> + compatible = "qcom,wcnss-wlan";
> +
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx", "rx";
> +
> + qcom,smem-states = <&apps_smsm 10>,
> + <&apps_smsm 9>;
> + qcom,smem-state-names = "tx-enable",
> + "tx-rings-empty";
> + };
> + };
> + };
> + };
> + };
> +
> + smd {
"so" < "sm"
> + compatible = "qcom,smd";
> +
> + rpm {
> + interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
> + qcom,ipc = <&apcs1_mbox 8 0>;
> + qcom,smd-edge = <15>;
> +
> + rpm_requests: rpm-requests {
> + compatible = "qcom,rpm-msm8936";
> + qcom,smd-channels = "rpm_requests";
> +
> + rpmcc: clock-controller {
> + compatible = "qcom,rpmcc-msm8936", "qcom,rpmcc";
> + #clock-cells = <1>;
> + clock-names = "xo";
> + clocks = <&xo_board>;
> + };
> +
> + rpmpd: power-controller {
> + compatible = "qcom,msm8939-rpmpd";
> + #power-domain-cells = <1>;
> + operating-points-v2 = <&rpmpd_opp_table>;
> +
> + rpmpd_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + rpmpd_opp_ret: opp1 {
> + opp-level = <1>;
> + };
> +
> + rpmpd_opp_svs_krait: opp2 {
> + opp-level = <2>;
> + };
> +
> + rpmpd_opp_svs_soc: opp3 {
> + opp-level = <3>;
> + };
> +
> + rpmpd_opp_nom: opp4 {
> + opp-level = <4>;
> + };
> +
> + rpmpd_opp_turbo: opp5 {
> + opp-level = <5>;
> + };
> +
> + rpmpd_opp_super_turbo: opp6 {
> + opp-level = <6>;
> + };
> + };
> + };
> + };
> + };
> + };
[..]
> +
> + /* Dummy regulator for our non-psci cpu@X defintions */
It's a power-supply...
> + vreg_dummy: regulator-dummy {
> + #power-domain-cells = <0>;
> + };
> +
> + smp2p-wcnss {
This belongs up by the other smp2p node.
Regards,
Bjorn
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