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Message-ID: <20230117093533.3710000-1-quic_pkondeti@quicinc.com>
Date: Tue, 17 Jan 2023 15:05:33 +0530
From: Pavankumar Kondeti <quic_pkondeti@...cinc.com>
To: Abel Vesa <abel.vesa@...aro.org>,
Bjorn Andersson <andersson@...nel.org>
CC: <linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
Pavankumar Kondeti <quic_pkondeti@...cinc.com>
Subject: [PATCH] arm64: dts: qcom: sm8550: fix xo clock source in cpufreq-hw node
Currently, available frequencies for all CPUs are appearing as 2x
of the actual frequencies. Use xo clock source as bi_tcxo in the
cpufreq-hw node to fix this.
Signed-off-by: Pavankumar Kondeti <quic_pkondeti@...cinc.com>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 59756ec11564..a551ded31ddf 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2522,7 +2522,7 @@ cpufreq_hw: cpufreq@...91000 {
<0 0x17d92000 0 0x1000>,
<0 0x17d93000 0 0x1000>;
reg-names = "freq-domain0", "freq-domain1", "freq-domain2";
- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
+ clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
--
2.25.1
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