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Message-ID: <20230118091829.755-8-allen-kh.cheng@mediatek.com>
Date: Wed, 18 Jan 2023 17:18:27 +0800
From: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Stephen Boyd <sboyd@...nel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
<dri-devel@...ts.freedesktop.org>
CC: <Project_Global_Chrome_Upstream_Group@...iatek.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, <hsinyi@...omium.org>,
Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Subject: [PATCH v2 7/9] arm64: dts: mediatek: mt8186: Add DPI node
Add DPI node for MT8186 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Tested-by: Chen-Yu Tsai <wenst@...omium.org>
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index c52f9be1e750..45b9d6777929 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1230,6 +1230,23 @@
power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
};
+ dpi: dpi@...0a000 {
+ compatible = "mediatek,mt8186-dpi";
+ reg = <0 0x1400a000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_DPI>,
+ <&mmsys CLK_MM_DISP_DPI>,
+ <&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
+ assigned-clocks = <&topckgen CLK_TOP_DPI>;
+ assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
+ interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_LOW 0>;
+ status = "disabled";
+
+ port {
+ dpi_out: endpoint { };
+ };
+ };
+
dsi0: dsi@...13000 {
compatible = "mediatek,mt8186-dsi";
reg = <0 0x14013000 0 0x1000>;
--
2.18.0
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