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Message-Id: <20230118103458.107434-5-krzysztof.kozlowski@linaro.org>
Date: Wed, 18 Jan 2023 11:34:57 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [RFT PATCH v2 5/6] arm64: dts: qcom: sdm845-audio-wcd9340: commonize pinctrl
Pin configuration fow WCD9340 is the same in all users, so move it to
common file to reduce the code duplication (which still allows further
customizations per board).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
Changes since v1:
1. Add Rb tag.
2. Split from previous patchset.
---
.../arm64/boot/dts/qcom/sdm845-audio-wcd9340.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 11 -----------
.../dts/qcom/sdm845-xiaomi-beryllium-common.dtsi | 11 -----------
.../arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts | 10 ----------
.../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 11 -----------
arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts | 11 -----------
6 files changed, 15 insertions(+), 54 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-audio-wcd9340.dtsi b/arch/arm64/boot/dts/qcom/sdm845-audio-wcd9340.dtsi
index 0a94fde6741d..d0c77a8c1985 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-audio-wcd9340.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-audio-wcd9340.dtsi
@@ -32,6 +32,10 @@ wcd9340: codec@1,0 {
#clock-cells = <0>;
clock-frequency = <9600000>;
clock-output-names = "mclk";
+
+ pinctrl-0 = <&wcd_intr_default>;
+ pinctrl-names = "default";
+
qcom,micbias1-microvolt = <1800000>;
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <1800000>;
@@ -123,3 +127,14 @@ codec {
};
};
};
+
+&tlmm {
+ wcd_intr_default: wcd-intr-default-state {
+ pins = "gpio54";
+ function = "gpio";
+
+ input-enable;
+ bias-pull-down;
+ drive-strength = <2>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index 11b0554a6aea..e0289973d3e4 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -929,15 +929,6 @@ sdc2_card_det_n: sd-card-det-n-state {
function = "gpio";
bias-pull-up;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart3 {
@@ -1043,8 +1034,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
index 54eabacdc031..5aca280b3994 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi
@@ -416,15 +416,6 @@ sdc2_card_det_n: sd-card-det-n-state {
function = "gpio";
bias-pull-up;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart6 {
@@ -493,8 +484,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
index f81619c8a3ba..1ceeea0885b9 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts
@@ -616,14 +616,6 @@ sde_dsi_suspend: sde-dsi-suspend-state {
drive-strength = <2>;
bias-pull-down;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart6 {
@@ -700,8 +692,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
index b979d8ae8698..db868af1f399 100644
--- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
@@ -584,15 +584,6 @@ i2c11_hid_active: i2c11-hid-active-state {
drive-strength = <2>;
};
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
-
lid_pin_active: lid-pin-state {
pins = "gpio124";
function = "gpio";
@@ -703,8 +694,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
index 75773b06701b..6a9ced334f19 100644
--- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
+++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts
@@ -507,15 +507,6 @@ pen_rst_l: pen-rst-l-state {
*/
output-high;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart6 {
@@ -611,8 +602,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
--
2.34.1
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