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Message-ID: <Y8meCFkrVXurXlTk@google.com>
Date: Thu, 19 Jan 2023 19:46:16 +0000
From: Oliver Upton <oliver.upton@...ux.dev>
To: Akihiko Odaki <akihiko.odaki@...nix.com>
Cc: Mark Brown <broonie@...nel.org>, Marc Zyngier <maz@...nel.org>,
linux-kernel@...r.kernel.org, kvmarm@...ts.linux.dev,
kvmarm@...ts.cs.columbia.edu, linux-arm-kernel@...ts.infradead.org,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Alexandru Elisei <alexandru.elisei@....com>,
James Morse <james.morse@....com>,
Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
asahi@...ts.linux.dev, Alyssa Rosenzweig <alyssa@...enzweig.io>,
Sven Peter <sven@...npeter.dev>,
Hector Martin <marcan@...can.st>
Subject: Re: [PATCH v7 7/7] KVM: arm64: Normalize cache configuration
Hi Akihiko,
On Thu, Jan 12, 2023 at 11:38:52AM +0900, Akihiko Odaki wrote:
> Before this change, the cache configuration of the physical CPU was
> exposed to vcpus. This is problematic because the cache configuration a
> vcpu sees varies when it migrates between vcpus with different cache
> configurations.
>
> Fabricate cache configuration from the sanitized value, which holds the
> CTR_EL0 value the userspace sees regardless of which physical CPU it
> resides on.
>
> CLIDR_EL1 and CCSIDR_EL1 are now writable from the userspace so that
> the VMM can restore the values saved with the old kernel.
>
> Suggested-by: Marc Zyngier <maz@...nel.org>
> Signed-off-by: Akihiko Odaki <akihiko.odaki@...nix.com>
I needed to squash in the patch below to get all of this working.
Writing back the value read for a given cache level was failing, which I
caught with the get-reg-list selftest.
Pushed the result here if you want to have a look:
https://github.com/oupton/linux/tree/kvm-arm64/virtual-cache-geometry
--
Thanks,
Oliver
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 459e6d358dab..b6228f7d1d8d 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -148,17 +148,19 @@ static u32 get_ccsidr(struct kvm_vcpu *vcpu, u32 csselr)
static int set_ccsidr(struct kvm_vcpu *vcpu, u32 csselr, u32 val)
{
- u8 line_size = FIELD_GET(CCSIDR_EL1_LineSize, val);
+ u8 line_size = SYS_FIELD_GET(CCSIDR_EL1, LineSize, val);
+ u32 cur = get_ccsidr(vcpu, csselr);
+ u8 min_line_size = SYS_FIELD_GET(CCSIDR_EL1, LineSize, cur);
u32 *ccsidr = vcpu->arch.ccsidr;
u32 i;
- if ((val & CCSIDR_EL1_RES0) || line_size < get_min_cache_line_size(csselr))
+ if (cur == val)
+ return 0;
+
+ if ((val & CCSIDR_EL1_RES0) || line_size < min_line_size)
return -EINVAL;
if (!ccsidr) {
- if (val == get_ccsidr(vcpu, csselr))
- return 0;
-
ccsidr = kmalloc_array(CSSELR_MAX, sizeof(u32), GFP_KERNEL);
if (!ccsidr)
return -ENOMEM;
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