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Message-ID: <80e8fc50-af91-3191-dc47-83940236a49a@linux.alibaba.com>
Date: Thu, 19 Jan 2023 11:53:57 +0800
From: Jing Zhang <renyu.zj@...ux.alibaba.com>
To: Ian Rogers <irogers@...gle.com>
Cc: Xing Zhengjun <zhengjun.xing@...ux.intel.com>,
Will Deacon <will@...nel.org>,
James Clark <james.clark@....com>,
Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...aro.org>,
linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Andrew Kilroy <andrew.kilroy@....com>,
Shuai Xue <xueshuai@...ux.alibaba.com>,
Zhuo Song <zhuo.song@...ux.alibaba.com>,
John Garry <john.g.garry@...cle.com>
Subject: Re: [PATCH v8 1/9] perf pmu: Add #slots literal support for arm64
在 2023/1/17 下午4:45, John Garry 写道:
> On 17/01/2023 07:29, Jing Zhang wrote:
>> The slots in each architecture may be different, so add #slots literal
>> to obtain the slots of different architectures, and the #slots can be
>> applied in the metric. Currently, The #slots just support for arm64,
>> and other architectures will return NAN.
>>
>> On arm64, the value of slots is from the register PMMIR_EL1.SLOT, which
>> I can read in /sys/bus/event_source/device/armv8_pmuv3_*/caps/slots.
>> PMMIR_EL1.SLOT might read as zero if the PMU version is lower than
>> ID_AA64DFR0_EL1_PMUVer_V3P4 or the STALL_SLOT event is not implemented.
>>
>> Signed-off-by: Jing Zhang<renyu.zj@...ux.alibaba.com>
>
> Reviewed-by: John Garry <john.g.garry@...cle.com>
Hi Ian,
Do you think there are other problems with this patch? Can I get your tags?
Thanks,
Jing
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