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Message-Id: <20230119101644.10711-1-konrad.dybcio@linaro.org>
Date: Thu, 19 Jan 2023 11:16:43 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: linux-arm-msm@...r.kernel.org, andersson@...nel.org,
agross@...nel.org, krzysztof.kozlowski@...aro.org
Cc: marijn.suijten@...ainline.org, bhupesh.sharma@...aro.org,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 1/2] arm64: dts: qcom: sm6115: Add mdss_ prefix to mdss nodes
Add a mdss_ prefix to mdss nodes to keep them all near each other
when referencing them by label in device DTs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 08f93b1dc2f8..c0f9bdc25508 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1097,7 +1097,7 @@ ports {
port@0 {
reg = <0>;
dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
+ remote-endpoint = <&mdss_dsi0_in>;
};
};
};
@@ -1132,7 +1132,7 @@ opp-384000000 {
};
};
- dsi0: dsi@...4000 {
+ mdss_dsi0: dsi@...4000 {
compatible = "qcom,dsi-ctrl-6g-qcm2290";
reg = <0x05e94000 0x400>;
reg-names = "dsi_ctrl";
@@ -1155,11 +1155,11 @@ dsi0: dsi@...4000 {
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd SM6115_VDDCX>;
- phys = <&dsi0_phy>;
+ phys = <&mdss_dsi0_phy>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1172,14 +1172,14 @@ ports {
port@0 {
reg = <0>;
- dsi0_in: endpoint {
+ mdss_dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
- dsi0_out: endpoint {
+ mdss_dsi0_out: endpoint {
};
};
};
@@ -1204,7 +1204,7 @@ opp-187500000 {
};
};
- dsi0_phy: phy@...4400 {
+ mdss_dsi0_phy: phy@...4400 {
compatible = "qcom,dsi-phy-14nm-2290";
reg = <0x05e94400 0x100>,
<0x05e94500 0x300>,
@@ -1229,8 +1229,8 @@ dispcc: clock-controller@...0000 {
reg = <0x05f00000 0x20000>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&sleep_clk>,
- <&dsi0_phy 0>,
- <&dsi0_phy 1>,
+ <&mdss_dsi0_phy 0>,
+ <&mdss_dsi0_phy 1>,
<&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>;
#clock-cells = <1>;
#reset-cells = <1>;
--
2.39.1
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