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Message-ID: <Y8kvoBY61p7ZX1UP@wendy>
Date: Thu, 19 Jan 2023 11:55:12 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Walker Chen <walker.chen@...rfivetech.com>
CC: <linux-riscv@...ts.infradead.org>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Heiko Stübner <heiko@...ech.de>,
"Rafael J . Wysocki" <rafael@...nel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/2] dt-bindings: power: Add starfive,jh7110-pmu
Hey Walker,
On Thu, Jan 19, 2023 at 05:44:46PM +0800, Walker Chen wrote:
> Add bindings for the Power Management Unit on the StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Just FYI, an R-b given against the cover letter can usually be applied
to all patches in the series, unless otherwise stated.
So here's mine from v3:
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Whenever you re-submit the dts patch, you can send that with my R-b
already applied there too.
I'll give this a day or two for the build bots to look at it before
applying it.
Thanks,
Conor.
> ---
> .../bindings/power/starfive,jh7110-pmu.yaml | 45 +++++++++++++++++++
> .../dt-bindings/power/starfive,jh7110-pmu.h | 17 +++++++
> 2 files changed, 62 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
> create mode 100644 include/dt-bindings/power/starfive,jh7110-pmu.h
>
> diff --git a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
> new file mode 100644
> index 000000000000..98eb8b4110e7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 Power Management Unit
> +
> +maintainers:
> + - Walker Chen <walker.chen@...rfivetech.com>
> +
> +description: |
> + StarFive JH7110 SoC includes support for multiple power domains which can be
> + powered on/off by software based on different application scenes to save power.
> +
> +properties:
> + compatible:
> + enum:
> + - starfive,jh7110-pmu
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + "#power-domain-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - "#power-domain-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pwrc: power-controller@...30000 {
> + compatible = "starfive,jh7110-pmu";
> + reg = <0x17030000 0x10000>;
> + interrupts = <111>;
> + #power-domain-cells = <1>;
> + };
> diff --git a/include/dt-bindings/power/starfive,jh7110-pmu.h b/include/dt-bindings/power/starfive,jh7110-pmu.h
> new file mode 100644
> index 000000000000..132bfe401fc8
> --- /dev/null
> +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Author: Walker Chen <walker.chen@...rfivetech.com>
> + */
> +#ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
> +#define __DT_BINDINGS_POWER_JH7110_POWER_H__
> +
> +#define JH7110_PD_SYSTOP 0
> +#define JH7110_PD_CPU 1
> +#define JH7110_PD_GPUA 2
> +#define JH7110_PD_VDEC 3
> +#define JH7110_PD_VOUT 4
> +#define JH7110_PD_ISP 5
> +#define JH7110_PD_VENC 6
> +
> +#endif
> --
> 2.17.1
>
>
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