[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1674131227-26456-5-git-send-email-quic_srivasam@quicinc.com>
Date: Thu, 19 Jan 2023 17:57:04 +0530
From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To: <vkoul@...nel.org>, <agross@...nel.org>, <andersson@...nel.org>,
<robh+dt@...nel.org>, <broonie@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_rohkumar@...cinc.com>,
<srinivas.kandagatla@...aro.org>, <dianders@...omium.org>,
<swboyd@...omium.org>, <judyhsiao@...omium.org>,
<alsa-devel@...a-project.org>, <quic_rjendra@...cinc.com>,
<konrad.dybcio@...ainline.org>, <mka@...omium.org>
CC: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: [PATCH v3 4/7] arm64: dts: qcom: sc7280: Update VA/RX/TX macro clock nodes
Update VA, RX and TX macro and lpass_tlmm clock properties and
enable them.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Tested-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
---
.../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 81e0f3a..674b01a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -8,8 +8,67 @@
#include <dt-bindings/sound/qcom,q6afe.h>
+/delete-node/ &lpass_rx_macro;
+/delete-node/ &lpass_tx_macro;
+/delete-node/ &lpass_va_macro;
+
/{
/* BOARD-SPECIFIC TOP LEVEL NODES */
+ lpass_rx_macro: codec@...0000 {
+ compatible = "qcom,sc7280-lpass-rx-macro";
+ reg = <0 0x03200000 0 0x1000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&lpass_rx_swr_clk>, <&lpass_rx_swr_data>;
+
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_va_macro>;
+
+ clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+
+ #clock-cells = <0>;
+ #sound-dai-cells = <1>;
+ };
+
+ lpass_tx_macro: codec@...0000 {
+ compatible = "qcom,sc7280-lpass-tx-macro";
+ reg = <0 0x03220000 0 0x1000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&lpass_tx_swr_clk>, <&lpass_tx_swr_data>;
+
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_va_macro>;
+
+ clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+
+ #clock-cells = <0>;
+ #sound-dai-cells = <1>;
+ };
+
+ lpass_va_macro: codec@...0000 {
+ compatible = "qcom,sc7280-lpass-va-macro";
+ reg = <0 0x03370000 0 0x1000>;
+
+ pinctrl-0 = <&lpass_dmic01_clk>, <&lpass_dmic01_data>;
+ pinctrl-names = "default";
+
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+
+ clock-names = "mclk", "macro", "dcodec";
+
+ #clock-cells = <0>;
+ #sound-dai-cells = <1>;
+ };
+
sound: sound {
compatible = "google,sc7280-herobrine";
model = "SC7280-AUDIOREACH";
--
2.7.4
Powered by blists - more mailing lists