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Message-ID: <1674138393-475-14-git-send-email-quic_vpolimer@quicinc.com>
Date: Thu, 19 Jan 2023 19:56:31 +0530
From: Vinod Polimera <quic_vpolimer@...cinc.com>
To: <dri-devel@...ts.freedesktop.org>, <linux-arm-msm@...r.kernel.org>,
<freedreno@...ts.freedesktop.org>, <devicetree@...r.kernel.org>
CC: Vinod Polimera <quic_vpolimer@...cinc.com>,
<linux-kernel@...r.kernel.org>, <robdclark@...il.com>,
<dianders@...omium.org>, <swboyd@...omium.org>,
<quic_kalyant@...cinc.com>, <dmitry.baryshkov@...aro.org>,
<quic_khsieh@...cinc.com>, <quic_vproddut@...cinc.com>,
<quic_bjorande@...cinc.com>, <quic_abhinavk@...cinc.com>,
<quic_sbillaka@...cinc.com>
Subject: [PATCH Resend v11 13/15] drm/msm/disp/dpu: reset the datapath after timing engine disable
Reset the datapath after disabling the timing gen, such that
it can start on a clean slate when the intf is enabled back.
This was a recommended sequence from the DPU HW programming guide.
Signed-off-by: Vinod Polimera <quic_vpolimer@...cinc.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 0396084..3a37429 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -588,6 +588,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc)
}
}
+ dpu_encoder_helper_phys_cleanup(phys_enc);
phys_enc->enable_state = DPU_ENC_DISABLED;
}
--
2.7.4
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