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Message-ID: <20230120031047.628097-1-aik@amd.com>
Date: Fri, 20 Jan 2023 14:10:44 +1100
From: Alexey Kardashevskiy <aik@....com>
To: Alexey Kardashevskiy <aik@....com>
CC: <kvm@...r.kernel.org>, <x86@...nel.org>,
<linux-kernel@...r.kernel.org>, Yury Norov <yury.norov@...il.com>,
Venu Busireddy <venu.busireddy@...cle.com>,
Tony Luck <tony.luck@...el.com>,
Tom Lendacky <thomas.lendacky@....com>,
Thomas Gleixner <tglx@...utronix.de>,
"Sean Christopherson" <seanjc@...gle.com>,
Sandipan Das <sandipan.das@....com>,
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Subject: [PATCH kernel v3 0/3] KVM: SEV: Enable AMD SEV-ES DebugSwap
This is to use another AMD SEV-ES hardware assisted register swap,
more detail in 2/3. The patches are fairly independend but required in
this order.
The previous conversation is here:
https://lore.kernel.org/all/20221209043804.942352-1-aik@amd.com/
This is based on sha1
195df42eb64d Ingo Molnar "Merge branch into tip/master: 'x86/platform'"
in order to have recently added X86_FEATURE_NO_NESTED_DATA_BP cpu
feature.
Please comment. Thanks.
Alexey Kardashevskiy (3):
x86/amd: Cache debug register values in percpu variables
KVM: SEV: Enable data breakpoints in SEV-ES
x86/sev: Do not handle #VC for DR7 read/write
arch/x86/include/asm/debugreg.h | 9 +++-
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/include/asm/svm.h | 1 +
arch/x86/kvm/svm/svm.h | 16 +++++--
tools/arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kernel/cpu/amd.c | 47 ++++++++++++++------
arch/x86/kernel/hw_breakpoint.c | 4 +-
arch/x86/kernel/sev.c | 6 +++
arch/x86/kvm/svm/sev.c | 29 ++++++++++++
arch/x86/kvm/svm/svm.c | 3 +-
10 files changed, 94 insertions(+), 23 deletions(-)
--
2.38.1
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