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Date: Fri, 20 Jan 2023 15:09:35 +0100
From: Yann Sionneau <ysionneau@...ray.eu>
To: Arnd Bergmann <arnd@...db.de>, Jonathan Corbet <corbet@....net>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Will Deacon <will@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Boqun Feng <boqun.feng@...il.com>,
Mark Rutland <mark.rutland@....com>,
Eric Biederman <ebiederm@...ssion.com>,
Kees Cook <keescook@...omium.org>,
Oleg Nesterov <oleg@...hat.com>,
Ingo Molnar <mingo@...hat.com>,
Waiman Long <longman@...hat.com>,
"Aneesh Kumar K.V" <aneesh.kumar@...ux.ibm.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Nick Piggin <npiggin@...il.com>,
Paul Moore <paul@...l-moore.com>,
Eric Paris <eparis@...hat.com>,
Christian Brauner <brauner@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Jules Maselbas <jmaselbas@...ray.eu>,
Yann Sionneau <ysionneau@...ray.eu>,
Guillaume Thouvenin <gthouvenin@...ray.eu>,
Clement Leger <clement@...ment-leger.fr>,
Vincent Chardon <vincent.chardon@...ys-design.com>,
Marc Poulhiès <dkm@...aplop.net>,
Julian Vetter <jvetter@...ray.eu>,
Samuel Jones <sjones@...ray.eu>,
Ashley Lesdalons <alesdalons@...ray.eu>,
Thomas Costis <tcostis@...ray.eu>,
Marius Gligor <mgligor@...ray.eu>,
Jonathan Borne <jborne@...ray.eu>,
Julien Villette <jvillette@...ray.eu>,
Luc Michel <lmichel@...ray.eu>,
Louis Morhet <lmorhet@...ray.eu>,
Julien Hascoet <jhascoet@...ray.eu>,
Jean-Christophe Pince <jcpince@...il.com>,
Guillaume Missonnier <gmissonnier@...ray.eu>,
Alex Michon <amichon@...ray.eu>,
Huacai Chen <chenhuacai@...nel.org>,
WANG Xuerui <git@...0n.name>,
Shaokun Zhang <zhangshaokun@...ilicon.com>,
John Garry <john.garry@...wei.com>,
Guangbin Huang <huangguangbin2@...wei.com>,
Bharat Bhushan <bbhushan2@...vell.com>,
Bibo Mao <maobibo@...ngson.cn>,
Atish Patra <atishp@...shpatra.org>,
"Jason A. Donenfeld" <Jason@...c4.com>,
Qi Liu <liuqi115@...wei.com>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Catalin Marinas <catalin.marinas@....com>,
Mark Brown <broonie@...nel.org>,
Janosch Frank <frankja@...ux.ibm.com>,
Alexey Dobriyan <adobriyan@...il.com>
Cc: Benjamin Mugnier <mugnier.benjamin@...il.com>,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-mm@...ck.org,
linux-arch@...r.kernel.org, linux-audit@...hat.com,
linux-riscv@...ts.infradead.org, bpf@...r.kernel.org
Subject: [RFC PATCH v2 04/31] Documentation: Add binding for
kalray,kv3-1-apic-mailbox
From: Jules Maselbas <jmaselbas@...ray.eu>
Add documentation for `kalray,kv3-1-core-intc` binding.
Co-developed-by: Jules Maselbas <jmaselbas@...ray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@...ray.eu>
Signed-off-by: Yann Sionneau <ysionneau@...ray.eu>
---
Notes:
V1 -> V2: new patch
.../kalray,kv3-1-apic-mailbox.yaml | 75 +++++++++++++++++++
1 file changed, 75 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-apic-mailbox.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-apic-mailbox.yaml b/Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-apic-mailbox.yaml
new file mode 100644
index 000000000000..e1eb1c9fda0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/kalray,kv3-1-apic-mailbox.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/kalray,kv3-1-apic-mailbox#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Kalray kv3-1 APIC-Mailbox
+
+description: |
+ Each cluster in the Coolidge SoC includes an Advanced Programmable Interrupt
+ Controller (APIC) which is split in two part:
+ - a Generic Interrupt Controller (referred as APIC-GIC)
+ - a Mailbox Controller (referred as APIC-Mailbox)
+ The APIC-Mailbox contains 128 mailboxes of 8 bytes (size of a word),
+ this hardware block is basically a 1 KB of smart memory space.
+ Each mailbox can be independently configured with a trigger condition
+ and an input mode function.
+
+ Input mode are:
+ - write
+ - bitwise OR
+ - add
+
+ Interrupts are generated on a write when the mailbox content value
+ match the configured trigger condition.
+ Available conditions are:
+ - doorbell: always raise interruption on write
+ - match: when the mailbox's value equal the configured trigger value
+ - barrier: same as match but the mailbox's value is cleared on trigger
+ - threshold: when the mailbox's value is greater than, or equal to, the
+ configured trigger value
+
+ Since this hardware block generates IRQs based on writes to some memory
+ locations, it is both an interrupt controller and an MSI controller.
+
+allOf:
+ - $ref: /schemas/interrupt-controller.yaml#
+
+properties:
+ compatible:
+ const: kalray,kv3-1-apic-mailbox
+ "#interrupt-cells":
+ const: 1
+ description:
+ The IRQ number.
+ interrupt-controller: true
+ interrupt-parent: true
+ interrupts:
+ maxItems: 128
+ description: |
+ Specifies the interrupt line(s) in the interrupt-parent controller node;
+ valid values depend on the type of parent interrupt controller
+ msi-controller: true
+
+required:
+ - compatible
+ - reg
+ - "#interrupt-cells"
+ - interrupt-controller
+ - interrupt-parent
+ - interrupts
+ - msi-controller
+
+examples:
+ - |
+ apic_mailbox: interrupt-controller@...000 {
+ compatible = "kalray,kv3-1-apic-gic";
+ reg = <0 0xa00000 0 0x0f200>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-parent = <&apic_gic>;
+ interrups = <0 1 2 3 4 5 6 7 8 9>;
+ };
+
+...
--
2.37.2
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