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Message-ID: <f2b52912-b6ea-5f5f-7c5b-de68225a9b3b@gmail.com>
Date: Sat, 21 Jan 2023 12:09:43 +0100
From: Johan Jonker <jbx6244@...il.com>
To: linus.walleij@...aro.org, brgl@...ev.pl
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
heiko@...ech.de, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
kever.yang@...k-chips.com, sjg@...omium.org,
philipp.tomsich@...ll.eu, john@...anate.com,
quentin.schulz@...obroma-systems.com
Subject: [PATCH v2 7/8] arm64: dts: rockchip: replace compatible gpio nodes
Currently all Rockchip gpio nodes have the same compatible.
Compatible strings should be SoC related.
Signed-off-by: Johan Jonker <jbx6244@...il.com>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++----
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 +++++-----
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 10 +++++-----
7 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 9fcc0d0f3..5f8886623 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1382,7 +1382,7 @@
ranges;
gpio0: gpio@...40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff040000 0x0 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
@@ -1395,7 +1395,7 @@
};
gpio1: gpio@...50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1408,7 +1408,7 @@
};
gpio2: gpio@...60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1421,7 +1421,7 @@
};
gpio3: gpio@...70000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,px30-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff270000 0x0 0x100>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 38976f413..1e5742441 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -793,7 +793,7 @@
ranges;
gpio0: gpio@...20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -805,7 +805,7 @@
};
gpio1: gpio@...30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -817,7 +817,7 @@
};
gpio2: gpio@...40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -829,7 +829,7 @@
};
gpio3: gpio@...50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -841,7 +841,7 @@
};
gpio4: gpio@...60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3308-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 7ba695728..b99bef14f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1045,7 +1045,7 @@
ranges;
gpio0: gpio@...10000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1059,7 +1059,7 @@
};
gpio1: gpio@...20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1073,7 +1073,7 @@
};
gpio2: gpio@...30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1087,7 +1087,7 @@
};
gpio3: gpio@...40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3328-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 5a008ed18..1ece57343 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -978,7 +978,7 @@
ranges;
gpio0: gpio@...50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
clocks = <&cru PCLK_GPIO0>;
interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
@@ -992,7 +992,7 @@
};
gpio1: gpio@...80000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO1>;
interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
@@ -1006,7 +1006,7 @@
};
gpio2: gpio@...90000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1020,7 +1020,7 @@
};
gpio3: gpio@...a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3368-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7eb96fcc6..e60917fff 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2085,7 +2085,7 @@
ranges;
gpio0: gpio@...20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff720000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2099,7 +2099,7 @@
};
gpio1: gpio@...30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff730000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO1_PMU>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2113,7 +2113,7 @@
};
gpio2: gpio@...80000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2127,7 +2127,7 @@
};
gpio3: gpio@...88000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff788000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -2141,7 +2141,7 @@
};
gpio4: gpio@...90000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3399-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO4>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 870b4d9c6..892afccfd 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1803,7 +1803,7 @@
ranges;
gpio0: gpio@...60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfdd60000 0x0 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
@@ -1815,7 +1815,7 @@
};
gpio1: gpio@...40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe740000 0x0 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1827,7 +1827,7 @@
};
gpio2: gpio@...50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe750000 0x0 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1839,7 +1839,7 @@
};
gpio3: gpio@...60000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe760000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1851,7 +1851,7 @@
};
gpio4: gpio@...70000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3568-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfe770000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 005cde61b..09bd4a508 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1639,7 +1639,7 @@
#size-cells = <2>;
gpio0: gpio@...a0000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfd8a0000 0x0 0x100>;
interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO0>, <&cru DBCLK_GPIO0>;
@@ -1651,7 +1651,7 @@
};
gpio1: gpio@...20000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec20000 0x0 0x100>;
interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
@@ -1663,7 +1663,7 @@
};
gpio2: gpio@...30000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec30000 0x0 0x100>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
@@ -1675,7 +1675,7 @@
};
gpio3: gpio@...40000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec40000 0x0 0x100>;
interrupts = <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
@@ -1687,7 +1687,7 @@
};
gpio4: gpio@...50000 {
- compatible = "rockchip,gpio-bank";
+ compatible = "rockchip,rk3588-gpio-bank", "rockchip,gpio-bank";
reg = <0x0 0xfec50000 0x0 0x100>;
interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
--
2.20.1
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