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Message-ID: <43ff6113-03ee-a40a-b454-53cadec8728a@linaro.org>
Date: Sun, 22 Jan 2023 14:57:07 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Christian Marangi <ansuelsmth@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Ilia Lin <ilia.lin@...nel.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Nishanth Menon <nm@...com>, Stephen Boyd <sboyd@...nel.org>,
Yassine Oudjana <y.oudjana@...tonmail.com>,
linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr
bindings optional
On 21/01/2023 01:01, Christian Marangi wrote:
> The qcom-cpufreq-nvmem driver also supports legacy devices pre-cpr that
> doesn't have power-domains. When the schema was introduced, it was
> wrongly set to always require these binding but this is not the case for
> legacy device that base everything on nvmem cells and multiple microvolt
What is a "legacy device"? Why do you adjust bindings to legacy device?
Can't you just fix the DTS on these devices?
> binding providing values based on speedbin, psv and version.
>
> Make the power-domain optional and set them required only for qcs404
> based devices.
>
> Fixes: ec24d1d55469 ("dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema")
> Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> ---
> .../bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 78 +++++++++++++------
> 1 file changed, 54 insertions(+), 24 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
> index 9c086eac6ca7..04aac634d7fc 100644
> --- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
> +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml
> @@ -17,6 +17,9 @@ description: |
> on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
> according to the required OPPs defined in the CPU OPP tables.
>
> + For old implementation efuses are parsed to select the correct opp table and
> + voltage and CPR is not supported/used.
> +
> select:
> properties:
> compatible:
> @@ -33,37 +36,64 @@ select:
> required:
> - compatible
>
> -properties:
> - cpus:
> - type: object
> +if:
Missing allOf. Fix also the placement - this block goes before
additionalPropertes:false.
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,qcs404
>
> - patternProperties:
> - '^cpu@[0-9a-f]+$':
> - type: object
> +then:
> + properties:
> + cpus:
> + type: object
>
> - properties:
> - power-domains:
Best regards,
Krzysztof
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