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Message-ID: <CAA8EJppFKDXJtt5zyM4mhEJ=BQwHUCVJcJKeH2GjkzAvwbfCBw@mail.gmail.com>
Date: Sun, 22 Jan 2023 21:15:53 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: Ilia Lin <ilia.lin@...nel.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Nishanth Menon <nm@...com>, Stephen Boyd <sboyd@...nel.org>,
Yassine Oudjana <y.oudjana@...tonmail.com>,
linux-pm@...r.kernel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] dt-bindings: opp: opp-v2-kryo-cpu: enlarge
opp-supported-hw maximum
On Sun, 22 Jan 2023 at 20:13, Christian Marangi <ansuelsmth@...il.com> wrote:
>
> On Sun, Jan 22, 2023 at 07:59:42PM +0200, Dmitry Baryshkov wrote:
> > On Sun, 22 Jan 2023 at 19:46, Christian Marangi <ansuelsmth@...il.com> wrote:
> > >
> > > Enlarge opp-supported-hw maximum value. In recent SoC we started
> > > matching more bit and we currently match mask of 112. The old maximum of
> > > 7 was good for old SoC that didn't had complex id, but now this is
> > > limiting and we need to enlarge it to support more variants.
> > >
> > > Document all the various mask that can be used and limit them to only
> > > reasonable values instead of using a generic maximum limit.
> > >
> > > Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
> > > ---
> > > .../bindings/opp/opp-v2-kryo-cpu.yaml | 20 +++++++++++++++++--
> > > 1 file changed, 18 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
> > > index b4947b326773..908cb0d7695a 100644
> > > --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
> > > +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
> > > @@ -50,12 +50,28 @@ patternProperties:
> > > opp-supported-hw:
> > > description: |
> > > A single 32 bit bitmap value, representing compatible HW.
> > > - Bitmap:
> > > + Bitmap for MSM8996 format:
> > > 0: MSM8996, speedbin 0
> > > 1: MSM8996, speedbin 1
> > > 2: MSM8996, speedbin 2
> > > 3-31: unused
> > > - maximum: 0x7
> > > +
> > > + Bitmap for MSM8996 later revision format:
> > > + 0: MSM8996, speedbin 0
> > > + 1: MSM8996, speedbin 1
> > > + 2: MSM8996, speedbin 2
> > > + 3: always set
> >
> > This is used for speedbin 3
> >
>
> Is it right that 4 bit speedbin is only introduced later? Cause looking
> at the current opp-supported-hw for MSM8996SG and MSM8996 originally
> (and based on what this Documentation say) there were only 3 bit and
> then they started using a 4th bit. Just asking if it's ok to keep the
> bitmap split or i should just merge it.
I don't think I got the question, please excuse me. Historically
msm8996.dtsi used 0xff as 'all possible platforms' value for the GPU
tables. Lately I fixed the CPU tables, added support for speed-bin 3.
However I left these 0xff in GPU opp table intact. I don't remember if
there was any reason behind that. Anyway this bit isn't always set, it
is set only for the entries which should be selected for MSM8996 speed
bin 3.
>
> > > + 4-31: unused
> > > +
> > > + Bitmap for MSM8996SG format (speedbin shifted of 4 left):
> > > + 0-3: unused
> > > + 4: MSM8996SG, speedbin 0
> > > + 5: MSM8996SG, speedbin 1
> > > + 6: MSM8996SG, speedbin 2
> > > + 7-31: unused
> > > + enum: [0x1, 0x2, 0x3, 0x4, 0x7,
> > > + 0x9, 0xd, 0xe, 0xf,
> > > + 0x10, 0x20, 0x30, 0x70]
> > >
> > > clock-latency-ns: true
> > >
> > > --
> > > 2.38.1
> > >
>
> --
> Ansuel
--
With best wishes
Dmitry
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