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Message-ID: <1674498274-6010-1-git-send-email-quic_khsieh@quicinc.com>
Date:   Mon, 23 Jan 2023 10:24:20 -0800
From:   Kuogee Hsieh <quic_khsieh@...cinc.com>
To:     <dri-devel@...ts.freedesktop.org>, <robdclark@...il.com>,
        <sean@...rly.run>, <swboyd@...omium.org>, <dianders@...omium.org>,
        <vkoul@...nel.org>, <daniel@...ll.ch>, <airlied@...il.com>,
        <agross@...nel.org>, <dmitry.baryshkov@...aro.org>,
        <andersson@...nel.org>
CC:     Kuogee Hsieh <quic_khsieh@...cinc.com>,
        <quic_abhinavk@...cinc.com>, <quic_sbillaka@...cinc.com>,
        <freedreno@...ts.freedesktop.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: [PATCH v1 00/14] add display port DSC feature

This patch add DSC related supporting functions into to both dp controller and dpu enccoder

Kuogee Hsieh (14):
  drm/msm/dp: add dpcd read of both dsc and fec capability
  drm/msm/dp: add dsc factor into calculation of supported bpp
  drm/msm/dp: add configure mainlink_levels base on lane number
  drm/msm/dp: correct configure Colorimetry Indicator Field at MISC0
  drm/msm/dp: upgrade tu calculation base on newest algorithm
  drm/msm/dp: add display compression related struct
  drm/msm/dp: add dsc helper functions
  drm/msm/dp: add dsc supporting functions to DP controller
  drm/msm/dsi: export struct msm_compression_info to dpu encoder
  drm/msm/disp/dpu: add supports of DSC encoder v1.2 engine
  drm/msm/disp/dpu1: add supports of new flush mechanism
  drm/msm/disp/dpu1: revise timing engine programming to work for DSC
  drm/msm/disp/dpu1: add dsc supporting functions to dpu encoder
  drm/msm/disp/dpu1: add sc7280 dsc block and sub block

 drivers/gpu/drm/msm/Makefile                       |   2 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_dsc_helper.c     | 537 +++++++++++++
 drivers/gpu/drm/msm/disp/dpu1/dpu_dsc_helper.h     |  25 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c        | 341 +++++++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h        |   4 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h   |   7 +-
 .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c   |  43 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     |  50 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |  74 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c         |  43 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h         |  21 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c         |  23 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h         |  23 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c     | 371 +++++++++
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c        | 132 ++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h        |  10 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h    |   3 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h         |   6 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c            |  10 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c             |  10 +-
 drivers/gpu/drm/msm/dp/dp_catalog.c                | 176 ++++-
 drivers/gpu/drm/msm/dp/dp_catalog.h                |  97 ++-
 drivers/gpu/drm/msm/dp/dp_ctrl.c                   | 839 ++++++++++++++-------
 drivers/gpu/drm/msm/dp/dp_display.c                |  61 +-
 drivers/gpu/drm/msm/dp/dp_link.c                   |  29 +-
 drivers/gpu/drm/msm/dp/dp_panel.c                  | 749 +++++++++++++++++-
 drivers/gpu/drm/msm/dp/dp_panel.h                  |  67 +-
 drivers/gpu/drm/msm/dp/dp_reg.h                    |  40 +-
 drivers/gpu/drm/msm/dsi/dsi.c                      |   3 +-
 drivers/gpu/drm/msm/dsi/dsi.h                      |   3 +-
 drivers/gpu/drm/msm/dsi/dsi_host.c                 |  14 +-
 drivers/gpu/drm/msm/msm_drv.h                      | 113 ++-
 32 files changed, 3429 insertions(+), 497 deletions(-)
 create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dsc_helper.c
 create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dsc_helper.h
 create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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