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Message-Id: <20230124221218.341511-5-william.zhang@broadcom.com>
Date: Tue, 24 Jan 2023 14:12:07 -0800
From: William Zhang <william.zhang@...adcom.com>
To: Linux SPI List <linux-spi@...r.kernel.org>,
Broadcom Kernel List <bcm-kernel-feedback-list@...adcom.com>
Cc: tomer.yacoby@...adcom.com, kursad.oney@...adcom.com,
dregan@...l.com, f.fainelli@...il.com, anand.gore@...adcom.com,
jonas.gorski@...il.com, dan.beygelman@...adcom.com,
joel.peshkin@...adcom.com,
William Zhang <william.zhang@...adcom.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rafał Miłecki <rafal@...ecki.pl>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 04/14] arm64: dts: broadcom: bcmbca: Add spi controller node
Add support for HSSPI controller in ARMv8 chip dts files.
Signed-off-by: William Zhang <william.zhang@...adcom.com>
---
Changes in v2:
- Update compatible string with SoC model number, controller version
info and bcmbca fall back name
- Add interrupt property
.../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 19 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 21 +++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 20 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 20 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm6813.dtsi | 21 +++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm6856.dtsi | 19 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 19 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94908.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm963146.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm963158.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm96813.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm96856.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 4 ++++
14 files changed, 167 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
index eb2a78f4e033..7818cd562e17 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -107,6 +107,12 @@ periph_clk: periph_clk {
clock-frequency = <50000000>;
clock-output-names = "periph";
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
soc {
@@ -531,6 +537,19 @@ leds: leds@800 {
#size-cells = <0>;
};
+ hsspi: spi@...0{
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
nand-controller@...0 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
index d5bc31980f03..75a63b5156b3 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -79,6 +79,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -86,6 +87,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
};
psci {
@@ -117,6 +124,20 @@ bus@...00000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@...0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>, <0x2610 0x4>;
+ reg-names = "hsspi", "spim-ctrl";
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@...00 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
index 6f805266d3c9..b4ef4e1ba7e0 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -60,6 +60,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -67,6 +68,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
};
psci {
@@ -99,6 +106,19 @@ bus@...00000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@...0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@...00 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
index b982249b80a2..fc11d85235f7 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -79,6 +79,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -86,6 +87,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
psci {
@@ -117,6 +124,19 @@ bus@...00000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@...0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@...00 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
index a996d436e977..412fafaede20 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -79,6 +79,7 @@ periph_clk: periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -86,6 +87,12 @@ uart_clk: uart-clk {
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
};
psci {
@@ -117,6 +124,20 @@ bus@...00000 {
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@...0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>, <0x2610 0x4>;
+ reg-names = "hsspi", "spim-ctrl";
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@...00 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
index 62c530d4b103..930110022260 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -60,6 +60,12 @@ periph_clk:periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
psci {
@@ -100,5 +106,18 @@ uart0: serial@640 {
clock-names = "refclk";
status = "disabled";
};
+
+ hsspi: spi@...0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
index 34c7b513d363..b9c1f7dad934 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -78,6 +78,12 @@ periph_clk:periph-clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
psci {
@@ -137,5 +143,18 @@ uart0: serial@640 {
clock-names = "refclk";
status = "disabled";
};
+
+ hsspi: spi@...0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0",
+ "brcm,bcmbca-hsspi";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
index fcbd3c430ace..c4e6e71f6310 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
index a3623e6f6919..e69cd683211a 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
index e39f1e6d4774..db2c82d6dfd8 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
index eba07e0b1ca6..25c12bc63545 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
index af17091ae764..faba21f03120 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
index 032aeb75c983..9808331eede2 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
index 0cbf582f5d54..1f561c8e13b0 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -28,3 +28,7 @@ memory@0 {
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--
2.37.3
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