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Message-ID: <CAHk-=wjJ2-ReHbDfLwjTVY=Sx=cFq+zNzp80ALQOb=V1+y0taQ@mail.gmail.com>
Date: Mon, 23 Jan 2023 18:07:20 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>, x86@...nel.org,
Kostya Serebryany <kcc@...gle.com>,
Andrey Ryabinin <ryabinin.a.a@...il.com>,
Andrey Konovalov <andreyknvl@...il.com>,
Alexander Potapenko <glider@...gle.com>,
Taras Madan <tarasmadan@...gle.com>,
Dmitry Vyukov <dvyukov@...gle.com>,
"H . J . Lu" <hjl.tools@...il.com>,
Andi Kleen <ak@...ux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>,
Bharata B Rao <bharata@....com>,
Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Ashok Raj <ashok.raj@...el.com>, linux-mm@...ck.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCHv15 00/17] Linear Address Masking enabling
On Mon, Jan 23, 2023 at 2:05 PM Kirill A. Shutemov
<kirill.shutemov@...ux.intel.com> wrote:
>
> Linear Address Masking[1] (LAM) modifies the checking that is applied to
> 64-bit linear addresses, allowing software to use of the untranslated
> address bits for metadata.
>
> The capability can be used for efficient address sanitizers (ASAN)
> implementation and for optimizations in JITs and virtual machines.
>
> The patchset brings support for LAM for userspace addresses. Only LAM_U57 at
> this time.
I didn't react to anything objectionable in the series.
My only reaction was actually to ask "when / what CPU cores are
expected to support this feature"?
Maybe it was mentioned somewhere, and I'm just blind and not finding
it. But even the "Instruction Set Extensions and Future Features"
paper seems to just be talking about the CPUID bits, not about any
actual "this is when we expect it".
(But again, I only scanned it, so maybe it's there and I just missed it).
Linus
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