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Message-ID: <5935520157460c156ab61860054c05ae6af4dd09.camel@collabora.com>
Date: Tue, 24 Jan 2023 08:59:41 -0500
From: Nicolas Dufresne <nicolas.dufresne@...labora.com>
To: Benjamin Gaignard <benjamin.gaignard@...labora.com>,
ezequiel@...guardiasur.com.ar, p.zabel@...gutronix.de,
mchehab@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
hverkuil-cisco@...all.nl, nicolas.dufresne@...labora.co.uk
Cc: linux-media@...r.kernel.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
kernel@...labora.com
Subject: Re: [PATCH v3] media: verisilicon: HEVC: Only propose 10 bits
compatible pixels formats
Le jeudi 19 janvier 2023 à 09:47 +0100, Benjamin Gaignard a écrit :
> When decoding a 10bits bitstreams HEVC driver should only expose
> 10bits pixel formats.
> To fulfill this requirement it is needed to call hantro_reset_raw_fmt()
> when bit depth change and to correctly set match_depth in pixel formats
> enumeration.
>
> Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding")
I actually tested v3, not v1:
Tested with 8bit tiled / P010 linear, as that's what we have in GStreamer
upstream and it fixed the badly selected format issue. No fluster hack was used.
Fluster score was: 141 / 147
Tested-by: Nicolas Dufresne <nicolas.dufresne@...labora.com>
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...labora.com>
> ---
> version 3:
> - Propagate hantro_reset_raw_fmt() error.
> I hope I have correctly understood Ezekiel's thoughts
> in the way I have implemented them.
>
> version 2:
> - Remove struct hantro_ctx *ctx variable in hantro_try_ctrl()
> because it isn't used anymore.
>
> .../media/platform/verisilicon/hantro_drv.c | 40 +++++++++++++++----
> .../media/platform/verisilicon/hantro_v4l2.c | 6 +--
> .../media/platform/verisilicon/hantro_v4l2.h | 1 +
> .../media/platform/verisilicon/imx8m_vpu_hw.c | 2 +
> 4 files changed, 38 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
> index 8cb4a68c9119..a713a45c0108 100644
> --- a/drivers/media/platform/verisilicon/hantro_drv.c
> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> @@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
>
> static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> {
> - struct hantro_ctx *ctx;
> -
> - ctx = container_of(ctrl->handler,
> - struct hantro_ctx, ctrl_handler);
> -
> if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
> const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
>
> @@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
> /* Only 8-bit and 10-bit are supported */
> return -EINVAL;
> -
> - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8;
> } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) {
> const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame;
>
> @@ -286,6 +279,32 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> return 0;
> }
>
> +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
> +{
> + struct hantro_ctx *ctx;
> +
> + ctx = container_of(ctrl->handler,
> + struct hantro_ctx, ctrl_handler);
> +
> + vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
> +
> + switch (ctrl->id) {
> + case V4L2_CID_STATELESS_HEVC_SPS:
> + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
> + int bit_depth = sps->bit_depth_luma_minus8 + 8;
> +
> + if (ctx->bit_depth != bit_depth) {
> + ctx->bit_depth = bit_depth;
> + return hantro_reset_raw_fmt(ctx);
> + }
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static int hantro_jpeg_s_ctrl(struct v4l2_ctrl *ctrl)
> {
> struct hantro_ctx *ctx;
> @@ -328,6 +347,11 @@ static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
> .try_ctrl = hantro_try_ctrl,
> };
>
> +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = {
> + .s_ctrl = hantro_hevc_s_ctrl,
> + .try_ctrl = hantro_try_ctrl,
> +};
> +
> static const struct v4l2_ctrl_ops hantro_jpeg_ctrl_ops = {
> .s_ctrl = hantro_jpeg_s_ctrl,
> };
> @@ -470,7 +494,7 @@ static const struct hantro_ctrl controls[] = {
> .codec = HANTRO_HEVC_DECODER,
> .cfg = {
> .id = V4L2_CID_STATELESS_HEVC_SPS,
> - .ops = &hantro_ctrl_ops,
> + .ops = &hantro_hevc_ctrl_ops,
> },
> }, {
> .codec = HANTRO_HEVC_DECODER,
> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
> index 2c7a805289e7..cd85877bbbe2 100644
> --- a/drivers/media/platform/verisilicon/hantro_v4l2.c
> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
> @@ -398,7 +398,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx)
> hantro_set_fmt_out(ctx, fmt);
> }
>
> -static void
> +int
> hantro_reset_raw_fmt(struct hantro_ctx *ctx)
> {
> const struct hantro_fmt *raw_vpu_fmt;
> @@ -420,9 +420,9 @@ hantro_reset_raw_fmt(struct hantro_ctx *ctx)
> raw_fmt->width = encoded_fmt->width;
> raw_fmt->height = encoded_fmt->height;
> if (ctx->is_encoder)
> - hantro_set_fmt_out(ctx, raw_fmt);
> + return hantro_set_fmt_out(ctx, raw_fmt);
> else
> - hantro_set_fmt_cap(ctx, raw_fmt);
> + return hantro_set_fmt_cap(ctx, raw_fmt);
> }
>
> void hantro_reset_fmts(struct hantro_ctx *ctx)
> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h
> index 64f6f57e9d7a..cb8e1fe3422d 100644
> --- a/drivers/media/platform/verisilicon/hantro_v4l2.h
> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.h
> @@ -21,6 +21,7 @@
> extern const struct v4l2_ioctl_ops hantro_ioctl_ops;
> extern const struct vb2_ops hantro_queue_ops;
>
> +int hantro_reset_raw_fmt(struct hantro_ctx *ctx);
> void hantro_reset_fmts(struct hantro_ctx *ctx);
> int hantro_get_format_depth(u32 fourcc);
> const struct hantro_fmt *
> diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
> index b390228fd3b4..f850d8bddef6 100644
> --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
> +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
> @@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
> {
> .fourcc = V4L2_PIX_FMT_NV12,
> .codec_mode = HANTRO_MODE_NONE,
> + .match_depth = true,
> .postprocessed = true,
> .frmsize = {
> .min_width = FMT_MIN_WIDTH,
> @@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
> {
> .fourcc = V4L2_PIX_FMT_P010,
> .codec_mode = HANTRO_MODE_NONE,
> + .match_depth = true,
> .postprocessed = true,
> .frmsize = {
> .min_width = FMT_MIN_WIDTH,
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