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Message-ID: <abedd2e8-3c7e-f347-06af-99f2e5a2412b@linaro.org>
Date: Wed, 25 Jan 2023 08:35:45 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: William Zhang <william.zhang@...adcom.com>,
Linux SPI List <linux-spi@...r.kernel.org>,
Broadcom Kernel List <bcm-kernel-feedback-list@...adcom.com>
Cc: tomer.yacoby@...adcom.com, kursad.oney@...adcom.com,
dregan@...l.com, f.fainelli@...il.com, anand.gore@...adcom.com,
jonas.gorski@...il.com, dan.beygelman@...adcom.com,
joel.peshkin@...adcom.com,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 02/14] dt-bindings: spi: Add bcmbca-hsspi controller
support
On 24/01/2023 23:12, William Zhang wrote:
> The new Broadcom Broadband BCMBCA SoCs includes a updated HSSPI
> controller. Add new compatible strings to differentiate the old and new
> controller while keeping MIPS based chip with the old compatible. Update
> property requirements for these two revisions of the controller. Also
> add myself and Kursad as the maintainers.
>
> Signed-off-by: William Zhang <william.zhang@...adcom.com>
>
> ---
>
> Changes in v2:
> - Update new compatible string to follow Broadcom convention <chip
> specific compatible>, <version of the IP>, <fallback>
> - Add reg-names min/maxItem constraints to be consistent with reg
> property
> - Make interrupts required property
> - Remove double quote from spi-controller.yaml reference
> - Remove brcm,use-cs-workaround flag
> - Update the example with new compatile and interrupts property
> - Update commit message
>
> .../bindings/spi/brcm,bcm63xx-hsspi.yaml | 106 +++++++++++++++++-
> 1 file changed, 101 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml b/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml
> index d1a0c9adee7a..d39604654c9e 100644
> --- a/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml
> @@ -4,20 +4,73 @@
> $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: Broadcom BCM6328 High Speed SPI controller
> +title: Broadcom Broadband SoC High Speed SPI controller
>
> maintainers:
> +
This is a friendly reminder during the review process.
It seems my previous comments were not fully addressed. Maybe my
feedback got lost between the quotes, maybe you just forgot to apply it.
Please go back to the previous discussion and either implement all
requested changes or keep discussing them.
Thank you.
> + - William Zhang <william.zhang@...adcom.com>
> + - Kursad Oney <kursad.oney@...adcom.com>
> - Jonas Gorski <jonas.gorski@...il.com>
>
> -allOf:
> - - $ref: spi-controller.yaml#
In your previous patch, put it already in desired place (after
"required:"), so you will not have to shuffle it.
> +description: |
> + Broadcom Broadband SoC supports High Speed SPI master controller since the
> + early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0
> + controller was carried over to recent ARM based chips, such as BCM63138,
> + BCM4908 and BCM6858. The old MIPS based chip should continue to use the
> + brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to
> + use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as
> + defined below to match the specific chip along with ip revision info.
> +
> + This rev 1.0 controller has a limitation that can not keep the chip select line
> + active between the SPI transfers within the same SPI message. This can
> + terminate the transaction to some SPI devices prematurely. The issue can be
> + worked around by either the controller's prepend mode or using the dummy chip
> + select workaround. Driver automatically picks the suitable mode based on
> + transfer type so it is transparent to the user.
> +
> + The newer SoCs such as BCM6756, BCM4912 and BCM6855 include an updated SPI
> + controller rev 1.1 that add the capability to allow the driver to control chip
> + select explicitly. This solves the issue in the old controller.
>
> properties:
> compatible:
> - const: brcm,bcm6328-hsspi
> + oneOf:
> + - const: brcm,bcm6328-hsspi
> + - items:
> + - enum:
> + - brcm,bcm47622-hsspi
> + - brcm,bcm4908-hsspi
> + - brcm,bcm63138-hsspi
> + - brcm,bcm63146-hsspi
> + - brcm,bcm63148-hsspi
> + - brcm,bcm63158-hsspi
> + - brcm,bcm63178-hsspi
> + - brcm,bcm6846-hsspi
> + - brcm,bcm6856-hsspi
> + - brcm,bcm6858-hsspi
> + - brcm,bcm6878-hsspi
> + - const: brcm,bcmbca-hsspi-v1.0
> + - const: brcm,bcmbca-hsspi
Why do you need "brcm,bcmbca-hsspi"? Nothing binds to it, so it's
useless and very generic.
> + - items:
> + - enum:
> + - brcm,bcm4912-hsspi
> + - brcm,bcm6756-hsspi
> + - brcm,bcm6813-hsspi
> + - brcm,bcm6855-hsspi
> + - const: brcm,bcmbca-hsspi-v1.1
> + - const: brcm,bcmbca-hsspi
Same here.
>
> reg:
> - maxItems: 1
> + items:
> + - description: main registers
> + - description: miscellaneous control registers
> + minItems: 1
> +
> + reg-names:
> + items:
> + - const: hsspi
> + - const: spim-ctrl
> + minItems: 1
>
> clocks:
> items:
> @@ -39,10 +92,39 @@ required:
> - clock-names
> - interrupts
>
> +allOf:
> + - $ref: spi-controller.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - brcm,bcm6328-hsspi
> + - brcm,bcmbca-hsspi-v1.0
> + then:
> + properties:
> + reg:
> + minItems: 1
drop minItems
> + maxItems: 1
> + reg-names:
> + minItems: 1
drop minItems
> + maxItems: 1
> + else:
> + properties:
> + reg:
> + minItems: 2
> + maxItems: 2
> + reg-names:
> + minItems: 2
> + maxItems: 2
> + required:
> + - reg-names
> +
> unevaluatedProperties: false
>
> examples:
> - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> spi@...01000 {
> compatible = "brcm,bcm6328-hsspi";
> reg = <0x10001000 0x600>;
> @@ -53,3 +135,17 @@ examples:
> #address-cells = <1>;
> #size-cells = <0>;
> };
> + - |
> + spi@...01000 {
> + compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1",
> + "brcm,bcmbca-hsspi";
> + reg = <0xff801000 0x1000>,
> + <0xff802610 0x4>;
> + reg-names = "hsspi", "spim-ctrl";
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&hsspi>, <&hsspi_pll>;
> + clock-names = "hsspi", "pll";
> + num-cs = <8>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
Drop new example - the difference is only in reg. Or change old example
to have only one (newer, more complex).
Best regards,
Krzysztof
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