[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ad6673bd-1500-eb9e-f5be-95e63bb8ff64@redhat.com>
Date: Wed, 25 Jan 2023 15:03:20 +0100
From: Paolo Bonzini <pbonzini@...hat.com>
To: Sean Christopherson <seanjc@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org
Cc: "H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org
Subject: Re: [PATCH] x86: KVM: Add common feature flag for AMD's PSFD
On 1/24/23 20:45, Sean Christopherson wrote:
> Use a common X86_FEATURE_* flag for AMD's PSFD, and suppress it from
> /proc/cpuinfo via the standard method of an empty string instead of
> hacking in a one-off "private" #define in KVM. The request that led to
> KVM defining its own flag was really just that the feature not show up
> in /proc/cpuinfo, and additional patches+discussions in the interim have
> clarified that defining flags in cpufeatures.h purely so that KVM can
> advertise features to userspace is ok so long as the kernel already uses
> a word to track the associated CPUID leaf.
>
> No functional change intended.
>
> Link: https://lore.kernel.org/all/d1b1e0da-29f0-c443-6c86-9549bbe1c79d@redhat.como
> Link: https://lore.kernel.org/all/YxGZH7aOXQF7Pu5q@nazgul.tnic
> Link: https://lore.kernel.org/all/Y3O7UYWfOLfJkwM%2F@zn.tnic
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
> arch/x86/include/asm/cpufeatures.h | 1 +
> arch/x86/kvm/cpuid.c | 8 +-------
> 2 files changed, 2 insertions(+), 7 deletions(-)
Reviewed-by: Paolo Bonzini <pbonzini@...hat.com>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 61012476d66e..2acaebc7bb76 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -330,6 +330,7 @@
> #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */
> #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */
> #define X86_FEATURE_CPPC (13*32+27) /* Collaborative Processor Performance Control */
> +#define X86_FEATURE_AMD_PSFD (13*32+28) /* "" Predictive Store Forwarding Disable */
> #define X86_FEATURE_BTC_NO (13*32+29) /* "" Not vulnerable to Branch Type Confusion */
> #define X86_FEATURE_BRS (13*32+31) /* Branch Sampling available */
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 2a9f1e200dbc..fb2b0e3ecce1 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -59,12 +59,6 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted)
> return ret;
> }
>
> -/*
> - * This one is tied to SSB in the user API, and not
> - * visible in /proc/cpuinfo.
> - */
> -#define KVM_X86_FEATURE_AMD_PSFD (13*32+28) /* Predictive Store Forwarding Disable */
> -
> #define F feature_bit
>
> /* Scattered Flag - For features that are scattered by cpufeatures.h. */
> @@ -710,7 +704,7 @@ void kvm_set_cpu_caps(void)
> F(CLZERO) | F(XSAVEERPTR) |
> F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
> F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON) |
> - __feature_bit(KVM_X86_FEATURE_AMD_PSFD)
> + F(AMD_PSFD)
> );
>
> /*
>
> base-commit: 7cb79f433e75b05d1635aefaa851cfcd1cb7dc4f
Powered by blists - more mailing lists