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Message-ID: <CAGuA+ooVx2ODdXjuy2udO6F4V5fUy6EjeUaJPOvnjAE39QH3RA@mail.gmail.com>
Date: Wed, 25 Jan 2023 16:04:08 +0100
From: Balsam CHIHI <bchihi@...libre.com>
To: Matthias Brugger <matthias.bgg@...il.com>
Cc: daniel.lezcano@...aro.org, angelogioacchino.delregno@...labora.com,
rafael@...nel.org, amitk@...nel.org, rui.zhang@...el.com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
rdunlap@...radead.org, ye.xingchen@....com.cn,
p.zabel@...gutronix.de, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
khilman@...libre.com, james.lo@...iatek.com,
rex-bc.chen@...iatek.com
Subject: Re: [PATCH v11 3/6] arm64/dts/mt8195: Add efuse node to mt8195
On Wed, Jan 25, 2023 at 3:25 PM Matthias Brugger <matthias.bgg@...il.com> wrote:
>
>
>
> On 24/01/2023 14:17, bchihi@...libre.com wrote:
> > From: Balsam CHIHI <bchihi@...libre.com>
> >
> > Add efuse node.
> > This will be required by the thermal driver to get the calibration data.
> >
> > Signed-off-by: Balsam CHIHI <bchihi@...libre.com>
> > Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>
> I fixed the subject prefix to:
> arm64: dts: mt8195: ...
> to be in line with other commits.
> Please take that into account for future patches you send.
>
> Applied thanks!
>
Hi Matthias,
Thank you for the fix and for applying the patch!
Best regards,
Balsam
> > ---
> > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > index 5d31536f4c48..09df105f4606 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> > @@ -1380,6 +1380,12 @@ pciephy_glb_intr: pciephy-glb-intr@193 {
> > dp_calibration: dp-data@1ac {
> > reg = <0x1ac 0x10>;
> > };
> > + lvts_efuse_data1: lvts1-calib@1bc {
> > + reg = <0x1bc 0x14>;
> > + };
> > + lvts_efuse_data2: lvts2-calib@1d0 {
> > + reg = <0x1d0 0x38>;
> > + };
> > };
> >
> > u3phy2: t-phy@...40000 {
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