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Message-Id: <20230126063419.15971-4-samuel@sholland.org>
Date: Thu, 26 Jan 2023 00:34:19 -0600
From: Samuel Holland <samuel@...lland.org>
To: Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Samuel Holland <samuel@...lland.org>,
Andre Przywara <andre.przywara@....com>,
Conor Dooley <conor@...nel.org>,
Heiko Stuebner <heiko.stuebner@...ll.eu>,
Palmer Dabbelt <palmer@...belt.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-sunxi@...ts.linux.dev
Subject: [PATCH v2 3/3] riscv: dts: allwinner: d1: Add power controller node
The Allwinner D1 family of SoCs contain a PPU power domain controller
separate from the PRCM. It can power down the video engine and DSP, and
it contains special logic for hardware-assisted CPU idle.
Signed-off-by: Samuel Holland <samuel@...lland.org>
---
Changes in v2:
- Include a patch adding the device tree node
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index 3723612b1fd8..6fadcee7800f 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -799,6 +799,14 @@ tcon_tv0_out_tcon_top_hdmi: endpoint {
};
};
+ ppu: power-controller@...1000 {
+ compatible = "allwinner,sun20i-d1-ppu";
+ reg = <0x7001000 0x1000>;
+ clocks = <&r_ccu CLK_BUS_R_PPU>;
+ resets = <&r_ccu RST_BUS_R_PPU>;
+ #power-domain-cells = <1>;
+ };
+
r_ccu: clock-controller@...0000 {
compatible = "allwinner,sun20i-d1-r-ccu";
reg = <0x7010000 0x400>;
--
2.37.4
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