linux-kernel - [tip: x86/cpu] x86/cpu, kvm: Add the SMM

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Message-ID: <167472794585.4906.15706522387952091319.tip-bot2@tip-bot2>
Date:   Thu, 26 Jan 2023 10:12:25 -0000
From:   "tip-bot2 for Kim Phillips" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Kim Phillips <kim.phillips@....com>,
        "Borislav Petkov (AMD)" <bp@...en8.de>,
        Sean Christopherson <seanjc@...gle.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: [tip: x86/cpu] x86/cpu, kvm: Add the SMM_CTL MSR not present feature

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     faabfcb194a8d0686396e3fff6a5b42911f65191
Gitweb:        https://git.kernel.org/tip/faabfcb194a8d0686396e3fff6a5b42911f65191
Author:        Kim Phillips <kim.phillips@....com>
AuthorDate:    Tue, 24 Jan 2023 10:33:17 -06:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Wed, 25 Jan 2023 16:37:20 +01:00

x86/cpu, kvm: Add the SMM_CTL MSR not present feature

The SMM_CTL MSR not present feature was being open-coded for KVM.
Add it to its newly added CPUID leaf 0x80000021 EAX proper.

Also drop the bit description comments now the code is more
self-describing.

Signed-off-by: Kim Phillips <kim.phillips@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Acked-by: Sean Christopherson <seanjc@...gle.com>
Link: https://lore.kernel.org/r/20230124163319.2277355-7-kim.phillips@amd.com
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kvm/cpuid.c               | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 6bed80c..86e98bd 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -431,6 +431,7 @@
 #define X86_FEATURE_NO_NESTED_DATA_BP	(20*32+ 0) /* "" No Nested Data Breakpoints */
 #define X86_FEATURE_LFENCE_RDTSC	(20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */
 #define X86_FEATURE_NULL_SEL_CLR_BASE	(20*32+ 6) /* "" Null Selector Clears Base */
+#define X86_FEATURE_NO_SMM_CTL_MSR	(20*32+ 9) /* "" SMM_CTL MSR is not present */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index dde8d6b..28071e9 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -760,7 +760,7 @@ void kvm_set_cpu_caps(void)
 		kvm_cpu_cap_set(X86_FEATURE_LFENCE_RDTSC);
 	if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
 		kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE);
-	kvm_cpu_caps[CPUID_8000_0021_EAX] |= BIT(9) /* NO_SMM_CTL_MSR */;
+	kvm_cpu_cap_set(X86_FEATURE_NO_SMM_CTL_MSR);
 
 	kvm_cpu_cap_mask(CPUID_C000_0001_EDX,
 		F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |