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Message-ID: <Y9J2oPHHNQoU+7m7@ninjato>
Date: Thu, 26 Jan 2023 13:48:32 +0100
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: linux-renesas-soc@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Sergey Shtylyov <s.shtylyov@....ru>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
Hi Geert,
> > +static const struct soc_device_attribute rpcif_info_match[] = {
> > + { .soc_id = "r8a7795", .revision = "ES1.*", .data = &rpcif_info_r8a7795_es1 },
> > + { .soc_id = "r8a7796", .revision = "ES1.*", .data = &rpcif_info_r8a7796_es1 },
>
> As we do have a separate compatible value for R-Car M3-W+ aka R-Car M3-W ES3.0
> ("renesas,r8a77961-rpc-if"), and there is no R-Car M3-W ES2.x (see the PRR
> screwup handling in renesas_soc_init()), you can just match against
> "renesas,r8a7796-rpc-if instead.
Right, I missed that! This is awesome news because with us dropping H3
ES1 support, this means we can drop all the soc_device_match() handling
now and use compatibles only. There, everybody happy :D
> > + regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
> > + /* create mask with all affected bits set */
> > + RPCIF_PHYCNT_STRTIM(BIT(fls(rpc->info->strtim)) - 1),
>
> fls(0) = 0, and BIT(-1) is undefined, so this won't work for R-Car
> H3 ES1.x. So I'm afraid you cannot handle this without storing the
> actual mask ;-)
You misread the parens, it is: BIT(0) - 1 = 0
I actually wrote a program to print out the calculations to make sure I
got it right. But yeah, ES1 is obsolete now.
I'll send V3 later today.
Thanks everyone,
Wolfram
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