lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y9Ou20ocr+ReaFVZ@gondor.apana.org.au>
Date:   Fri, 27 Jan 2023 19:00:43 +0800
From:   Herbert Xu <herbert@...dor.apana.org.au>
To:     Jia Jie Ho <jiajie.ho@...rfivetech.com>
Cc:     Olivia Mackall <olivia@...enic.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Emil Renner Berthing <kernel@...il.dk>,
        Conor Dooley <conor.dooley@...rochip.com>,
        linux-crypto@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v5 0/3] hwrng: starfive: Add driver for TRNG module

On Tue, Jan 17, 2023 at 09:54:42AM +0800, Jia Jie Ho wrote:
> This patch series adds kernel support for StarFive JH7110 hardware
> random number generator. First 2 patches add binding docs and device
> driver for this module. Patch 3 adds devicetree entry for VisionFive 2
> SoC.
> 
> Patch 3 needs to be applied on top of:
> https://patchwork.kernel.org/project/linux-riscv/patch/20221220011247.35560-7-hal.feng@starfivetech.com/
> 
> Patch 3 also depends on additional clock and reset patches for stg
> domain that are yet to be submitted to mailing list.
> 
> Changes v4->v5:
> - Updated status in MAINTAINERS. (Conor)
> - Specified targeted device in Kconfig title and descriptions. (Conor)
> - Removed unnecessary goto label in patch 2. (Conor)
> - Enable runtime PM before registering hwrng in patch 2. (Conor)
> 
> Changes v3->v4:
> - Moved init_completion before IRQ registration to be prepared for
>   spurious interrupts. (Herbert)
> - Added locks to guard concurrent write to the same register. (Herbert)
> 
> Changes v2->v3:
> - Use constant usecs and convert to jiffies. (Herbert)
> - Removed sleep in irq handler. (Herbert)
> - Limited wait time to 40us if wait == 0 for trng read. (Herbert)
> 
> Changes v1->v2:
> - Updated of_match_ptr and added pm_sleep_ptr. (Krzysztof)
> - Dropped "status" in dts as module is always on. (Krzysztof)
> 
> Jia Jie Ho (3):
>   dt-bindings: rng: Add StarFive TRNG module
>   hwrng: starfive - Add TRNG driver for StarFive SoC
>   riscv: dts: starfive: Add TRNG node for VisionFive 2
> 
>  .../bindings/rng/starfive,jh7110-trng.yaml    |  55 +++
>  MAINTAINERS                                   |   6 +
>  arch/riscv/boot/dts/starfive/jh7110.dtsi      |  10 +
>  drivers/char/hw_random/Kconfig                |  11 +
>  drivers/char/hw_random/Makefile               |   1 +
>  drivers/char/hw_random/jh7110-trng.c          | 393 ++++++++++++++++++
>  6 files changed, 476 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml
>  create mode 100644 drivers/char/hw_random/jh7110-trng.c
> 
> -- 
> 2.25.1

Patches 1-2 applied.  Thanks.
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ