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Message-ID: <Y9PdrOvb8bYXpgVw@wendy>
Date: Fri, 27 Jan 2023 14:20:28 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Anup Patel <apatel@...tanamicro.com>
CC: Conor Dooley <conor@...nel.org>, Anup Patel <anup@...infault.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Atish Patra <atishp@...shpatra.org>,
Alistair Francis <Alistair.Francis@....com>,
<linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 1/9] RISC-V: Add AIA related CSR defines
On Fri, Jan 27, 2023 at 05:28:57PM +0530, Anup Patel wrote:
> On Wed, Jan 18, 2023 at 2:12 AM Conor Dooley <conor@...nel.org> wrote:
> > > > > +/* AIA CSR bits */
> > > > > +#define TOPI_IID_SHIFT 16
> > > > > +#define TOPI_IID_MASK 0xfff
> >
> > While I think of it, it'd be worth noting that these are generic across
> > all of topi, mtopi etc. Initially I thought that this mask was wrong as
> > the topi section says:
> > bits 25:16 Interrupt identity (source number)
> > bits 7:0 Interrupt priority
>
> These defines are for the AIA CSRs and not AIA APLIC IDC registers.
>
> As per the latest frozen spec, the mtopi/stopi/vstopi has following bits:
> bits: 27:16 IID
> bits: 7:0 IPRIO
I know, that those ones use those bits, hence leaving an R-b for the
patch - but your define says TOPI, which it is *not* accurate for.
That is confusing and should be noted.
> > What I was advocating for was picking one style and sticking to it.
> > These copy-paste from docs things are tedious and error prone to review,
> > and I don't think having multiple styles is helpful.
>
> On the other hand, I think we should let developers choose a style
> which is better suited for a particular register field instead enforcing
> it here. The best we can do is follow a naming convention for defines.
Well shall have to agree to disagree I suppose!
> > Tedious as it was, I did check all the numbers though, so in that
> > respect:
> > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
>
> BTW, this patch is shared with KVM AIA CSR series so most likely
> I will take this patch through that series.
Since the path which it gets applied is between you and Palmer to
decide, feel free to add the R-b whichever way the patch ends up going!
Thanks,
Conor.
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