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Message-Id: <20230128172856.3814-12-jszhang@kernel.org> Date: Sun, 29 Jan 2023 01:28:54 +0800 From: Jisheng Zhang <jszhang@...nel.org> To: Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, Albert Ou <aou@...s.berkeley.edu>, Anup Patel <anup@...infault.org>, Atish Patra <atishp@...shpatra.org>, Heiko Stuebner <heiko@...ech.de>, Andrew Jones <ajones@...tanamicro.com>, Conor Dooley <conor.dooley@...rochip.com> Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org, Guo Ren <guoren@...nel.org> Subject: [PATCH v5 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Switch cpu_relax() from static branch to the new helper riscv_has_extension_likely() Signed-off-by: Jisheng Zhang <jszhang@...nel.org> Reviewed-by: Andrew Jones <ajones@...tanamicro.com> Reviewed-by: Heiko Stuebner <heiko@...ech.de> Reviewed-by: Guo Ren <guoren@...nel.org> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com> --- arch/riscv/include/asm/vdso/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/vdso/processor.h b/arch/riscv/include/asm/vdso/processor.h index fa70cfe507aa..edf0e25e43d1 100644 --- a/arch/riscv/include/asm/vdso/processor.h +++ b/arch/riscv/include/asm/vdso/processor.h @@ -10,7 +10,7 @@ static inline void cpu_relax(void) { - if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) { + if (!riscv_has_extension_likely(RISCV_ISA_EXT_ZIHINTPAUSE)) { #ifdef __riscv_muldiv int dummy; /* In lieu of a halt instruction, induce a long-latency stall. */ -- 2.38.1
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