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Message-ID: <20230129051734.GE2948950@paulmck-ThinkPad-P17-Gen-1>
Date: Sat, 28 Jan 2023 21:17:34 -0800
From: "Paul E. McKenney" <paulmck@...nel.org>
To: Alan Stern <stern@...land.harvard.edu>
Cc: Andrea Parri <parri.andrea@...il.com>,
Jonas Oberhauser <jonas.oberhauser@...weicloud.com>,
will@...nel.org, peterz@...radead.org, boqun.feng@...il.com,
npiggin@...il.com, dhowells@...hat.com, j.alglave@....ac.uk,
luc.maranget@...ia.fr, akiyks@...il.com, dlustig@...dia.com,
joel@...lfernandes.org, urezki@...il.com, quic_neeraju@...cinc.com,
frederic@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] tools/memory-model: Make ppo a subrelation of po
On Sat, Jan 28, 2023 at 05:59:52PM -0500, Alan Stern wrote:
> On Sat, Jan 28, 2023 at 11:14:17PM +0100, Andrea Parri wrote:
> > > Evidently the plain-coherence check rules out x=1 at the
> > > end, because when I relax that check, x=1 becomes a possible result.
> > > Furthermore, the graphical output confirms that this execution has a
> > > ww-incoh edge from Wx=2 to Wx=1. But there is no ww-vis edge from Wx=1
> > > to Wx=2! How can this be possible? It seems like a bug in herd7.
> >
> > By default, herd7 performs some edges removal when generating the
> > graphical outputs. The option -showraw can be useful to increase
> > the "verbosity", for example,
> >
> > [with "exists (x=2)", output in /tmp/T.dot]
> > $ herd7 -conf linux-kernel.cfg T.litmus -show prop -o /tmp -skipchecks plain-coherence -doshow ww-vis -showraw ww-vis
>
> Okay, thanks, that helps a lot.
>
> So here's what we've got. The litmus test:
>
>
> C hb-and-int
> {}
>
> P0(int *x, int *y)
> {
> *x = 1;
> smp_store_release(y, 1);
> }
>
> P1(int *x, int *y, int *dx, int *dy, spinlock_t *l)
> {
> spin_lock(l);
> int r1 = READ_ONCE(*dy);
> if (r1==1)
> spin_unlock(l);
>
> int r0 = smp_load_acquire(y);
> if (r0 == 1) {
> WRITE_ONCE(*dx,1);
> }
The lack of a spin_unlock() when r1!=1 is intentional?
It is admittedly a cute way to prevent P3 from doing anything
when r1!=1. And P1 won't do anything if P3 runs first.
> }
>
> P2(int *dx, int *dy)
> {
> WRITE_ONCE(*dy,READ_ONCE(*dx));
> }
>
>
> P3(int *x, spinlock_t *l)
> {
> spin_lock(l);
> smp_mb__after_unlock_lock();
> *x = 2;
> }
>
> exists (x=2)
>
>
> The reason why Wx=1 ->ww-vis Wx=2:
>
> 0:Wx=1 ->po-rel 0:Wy=1 and po-rel < fence < ww-post-bounded.
>
> 0:Wy=1 ->rfe 1:Ry=1 ->(hb* & int) 1:Rdy=1 and
> (rfe ; hb* & int) <= (rfe ; xbstar & int) <= vis.
>
> 1:Rdy=1 ->po 1:unlock ->rfe 3:lock ->po 3:Wx=2
> so 1:Rdy=1 ->po-unlock-lock-po 3:Wx=2
> and po-unlock-lock-po <= mb <= fence <= w-pre-bounded.
>
> Finally, w-post-bounded ; vis ; w-pre-bounded <= ww-vis.
>
> This explains why the memory model says there isn't a data race. This
> doesn't use the smp_mb__after_unlock_lock at all.
You lost me on this one.
Suppose that P3 starts first, then P0. P1 is then stuck at the
spin_lock() because P3 does not release that lock. P2 goes out for a
pizza.
Why can't the two stores to x by P0 and P3 conflict, resulting in a
data race?
Thanx, Paul
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