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Message-Id: <20230130220056.14349-2-nick.hawkins@hpe.com>
Date: Mon, 30 Jan 2023 16:00:56 -0600
From: nick.hawkins@....com
To: soc@...nel.org, arnd@...db.de, verdun@....com,
nick.hawkins@....com, krzysztof.kozlowski+dt@...aro.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v1 1/1] ARM: dts: hpe: Correct GXP register ranges
From: Nick Hawkins <nick.hawkins@....com>
Correct memory ranges on GXP to include host registers. This corrects a
issue where the host interrupt controller is not available. Additionally
there is a large gap of reserved registers that will not be used. To avoid
this area two ranges are used.
Signed-off-by: Nick Hawkins <nick.hawkins@....com>
---
arch/arm/boot/dts/hpe-gxp.dtsi | 41 +++++++++++++++++-----------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
index cf735b3c4f35..30ed921f83ac 100644
--- a/arch/arm/boot/dts/hpe-gxp.dtsi
+++ b/arch/arm/boot/dts/hpe-gxp.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree file for HPE GXP
+ * Device Tree for HPE
*/
/dts-v1/;
@@ -43,7 +43,6 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
- dma-ranges;
L2: cache-controller@...40000 {
compatible = "arm,pl310-cache";
@@ -52,73 +51,73 @@
cache-level = <2>;
};
- ahb@...00000 {
+ ahb@...00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0xc0000000 0x30000000>;
- dma-ranges;
+ ranges = <0x0 0x80000000 0x20000000>,
+ <0x40000000 0xc0000000 0x3fff0000>;
- vic0: interrupt-controller@...0000 {
+ vic0: interrupt-controller@...f0000 {
compatible = "arm,pl192-vic";
- reg = <0xeff0000 0x1000>;
+ reg = <0x4eff0000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
};
- vic1: interrupt-controller@...00000 {
+ vic1: interrupt-controller@...000 {
compatible = "arm,pl192-vic";
- reg = <0x80f00000 0x1000>;
+ reg = <0xf00000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
};
- uarta: serial@e0 {
+ uarta: serial@...000e0 {
compatible = "ns16550a";
- reg = <0xe0 0x8>;
+ reg = <0x400000e0 0x8>;
interrupts = <17>;
interrupt-parent = <&vic0>;
clock-frequency = <1846153>;
reg-shift = <0>;
};
- uartb: serial@e8 {
+ uartb: serial@...000e8 {
compatible = "ns16550a";
- reg = <0xe8 0x8>;
+ reg = <0x400000e8 0x8>;
interrupts = <18>;
interrupt-parent = <&vic0>;
clock-frequency = <1846153>;
reg-shift = <0>;
};
- uartc: serial@f0 {
+ uartc: serial@...000f0 {
compatible = "ns16550a";
- reg = <0xf0 0x8>;
+ reg = <0x400000f0 0x8>;
interrupts = <19>;
interrupt-parent = <&vic0>;
clock-frequency = <1846153>;
reg-shift = <0>;
};
- usb0: usb@...0000 {
+ usb0: usb@...e0000 {
compatible = "hpe,gxp-ehci", "generic-ehci";
- reg = <0xefe0000 0x100>;
+ reg = <0x4efe0000 0x100>;
interrupts = <7>;
interrupt-parent = <&vic0>;
};
- st: timer@80 {
+ st: timer@...00080 {
compatible = "hpe,gxp-timer";
- reg = <0x80 0x16>;
+ reg = <0x40000080 0x16>;
interrupts = <0>;
interrupt-parent = <&vic0>;
clocks = <&iopclk>;
clock-names = "iop";
};
- usb1: usb@...0100 {
+ usb1: usb@...e0100 {
compatible = "hpe,gxp-ohci", "generic-ohci";
- reg = <0xefe0100 0x110>;
+ reg = <0x4efe0100 0x110>;
interrupts = <6>;
interrupt-parent = <&vic0>;
};
--
2.17.1
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