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Message-ID: <20230130225924.GA3682264-robh@kernel.org>
Date:   Mon, 30 Jan 2023 16:59:24 -0600
From:   Rob Herring <robh@...nel.org>
To:     Bartosz Golaszewski <brgl@...ev.pl>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Georgi Djakov <djakov@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH] dt-bindings: watchdog: qcom-wdt: add the interrupts
 property

On Mon, Jan 30, 2023 at 02:43:28PM +0100, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> 
> The interrupts property is used in all nodes using this binding but not
> defined in the document itself - hence dtbs_check fails for them. Add
> the property and update the example.
> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> ---
>  .../devicetree/bindings/watchdog/qcom-wdt.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
> index 27fb484d5f8d..45940d643b92 100644
> --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
> @@ -46,6 +46,10 @@ properties:
>    clocks:
>      maxItems: 1
>  
> +  interrupts:
> +    minItems: 1
> +    maxItems: 5

What is each interrupt?

> +
>  required:
>    - compatible
>    - reg
> @@ -55,9 +59,16 @@ unevaluatedProperties: false
>  
>  examples:
>    - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
>      watchdog@...a038 {
>        compatible = "qcom,kpss-wdt-ipq8064";
>        reg = <0x0208a038 0x40>;
>        clocks = <&sleep_clk>;
>        timeout-sec = <10>;
> +      interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
> +                   <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
> +                   <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
> +                   <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
> +                   <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
>      };
> -- 
> 2.37.2
> 

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