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Message-Id: <167512236602.4092892.13590634993322919413.b4-ty@kernel.org>
Date: Mon, 30 Jan 2023 17:46:10 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: agross@...nel.org, linux-arm-msm@...r.kernel.org,
konrad.dybcio@...aro.org, krzysztof.kozlowski@...aro.org
Cc: neil.armstrong@...aro.org, dmitry.baryshkov@...aro.org,
sean@...rly.run, dri-devel@...ts.freedesktop.org,
airlied@...il.com, robdclark@...il.com,
freedreno@...ts.freedesktop.org, marijn.suijten@...ainline.org,
daniel@...ll.ch, linux-kernel@...r.kernel.org,
dianders@...omium.org, quic_rajeevny@...cinc.com,
loic.poulain@...aro.org, quic_abhinavk@...cinc.com,
swboyd@...omium.org
Subject: Re: (subset) [PATCH 1/8] drm/msm/dsi: Allow 2 CTRLs on v2.5.0
On Fri, 20 Jan 2023 22:00:53 +0100, Konrad Dybcio wrote:
> v2.5.0 support was originally added for SC7280, but this hw is also
> present on SM8350, which has one more DSI host. Bump up the dsi count
> and fill in the register of the secondary host to allow it to probe.
>
> This should not have any adverse effects on SC7280, as the secondary
> CTRL will only be touched if it's defined, anyway.
>
> [...]
Applied, thanks!
[2/8] arm64: dts: qcom: sm8350: Add missing #address/size-cells to DSIn
commit: 6636818ecf0f1d448360835017473cf94a0ee967
[3/8] arm64: dts: qcom: sm8350: Fix DSI1 interrupt
commit: 1eed7995d9da0489e5a46c13bd888ffa987ead98
[4/8] arm64: dts: qcom: sm8350: Feed DSI1 PHY clocks to DISPCC
commit: 0af6a4012b3815ebca7b8080a286edc01e4a89e1
[5/8] arm64: dts: qcom: sm8350: Fix DSI PHY compatibles
commit: 45cd807de14388010a279765486c13f8ac540dfa
[6/8] arm64: dts: qcom: sm8350: Fix DSI PLL size
commit: e3e654ced376060d64ede8e2dfde0b1bac0f9086
[7/8] arm64: dts: qcom: sm8350: Add mdss_ prefix to DSIn out labels
commit: 2a07efb8c08619888428cc8fd47643c438111f29
[8/8] arm64: dts: qcom: sm8350: Hook up DSI1 to MDP
commit: b904227a4b693fbb9d5eabc9d7100dc01d9eb973
Best regards,
--
Bjorn Andersson <andersson@...nel.org>
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