linux-kernel - [PATCH v2 2/2] arm64: dts: qcom: sa8540p-ride: Document i2c busses

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Message-Id: <20230130154823.117542-2-ahalaney@redhat.com>
Date:   Mon, 30 Jan 2023 09:48:23 -0600
From:   Andrew Halaney <ahalaney@...hat.com>
To:     andersson@...nel.org
Cc:     agross@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        bmasney@...hat.com, quic_shazhuss@...cinc.com,
        Andrew Halaney <ahalaney@...hat.com>
Subject: [PATCH v2 2/2] arm64: dts: qcom: sa8540p-ride: Document i2c busses

It isn't obvious in the current devicetree what is connected. Go ahead
and document what's on the other end.

Signed-off-by: Andrew Halaney <ahalaney@...hat.com>
---

Changes since v1:
	* Document i2c12 having a max20411 (Shazad)

In v1 I said i2c12 was not connected, that's not true though (I just
have a board schematic which shows it not connected, but it _is_
connected on the SIP/SOM, which I verified with series [0]).

I debated waiting for Bjorn to sort out appropriate label names over at
[0] (and follow suit in a third patch here), but decided to get this
series out again to clean up the current warnings while that's worked
out. Once [0] is resubmitted I'll submit a separate patch to enable the
max20411 on this board as well!

[0] https://lore.kernel.org/linux-arm-msm/20230130035642.GA464800@hu-bjorande-lv.qualcomm.com/

Thanks,
Andrew

 arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 6ab4b435c49e..8b7555f22528 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -317,6 +317,7 @@ &xo_board_clk {

 &tlmm {
 	i2c0_default: i2c0-default-state {
+		/* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */
 		pins = "gpio135", "gpio136";
 		function = "qup0";
 		drive-strength = <2>;
@@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state {
 	};

 	i2c1_default: i2c1-default-state {
+		/* To PM40028B-F3EI PCIe switch */
 		pins = "gpio158", "gpio159";
 		function = "qup1";
 		drive-strength = <2>;
@@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state {
 	};

 	i2c12_default: i2c12-default-state {
+		/* To Maxim max20411 */
 		pins = "gpio0", "gpio1";
 		function = "qup12";
 		drive-strength = <2>;
@@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state {
 	};

 	i2c15_default: i2c15-default-state {
+		/* To display connector (SIP1 only) */
 		pins = "gpio36", "gpio37";
 		function = "qup15";
 		drive-strength = <2>;
@@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state {
 	};

 	i2c18_default: i2c18-default-state {
+		/* To ASM330LHH IMU (SIP1 only) */
 		pins = "gpio66", "gpio67";
 		function = "qup18";
 		drive-strength = <2>;
--
2.39.1