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Message-ID: <960b66c7-f476-b40c-b507-6932ff51ce76@linux.intel.com>
Date: Mon, 30 Jan 2023 10:32:47 -0600
From: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
To: Stefan Binding <sbinding@...nsource.cirrus.com>,
Vinod Koul <vkoul@...nel.org>,
Bard Liao <yung-chuan.liao@...ux.intel.com>,
Mark Brown <broonie@...nel.org>
Cc: alsa-devel@...a-project.org, linux-kernel@...r.kernel.org,
patches@...nsource.cirrus.com,
Richard Fitzgerald <rf@...nsource.cirrus.com>
Subject: Re: [PATCH v3 2/8] ASoC: cs42l42: Add SOFT_RESET_REBOOT register
On 1/27/23 10:51, Stefan Binding wrote:
> From: Richard Fitzgerald <rf@...nsource.cirrus.com>
>
> The SOFT_RESET_REBOOT register is needed to recover CS42L42 state after
> a Soundwire bus reset.
>
> This is required to be set whenever there is severe/hard bus reset.
>
> Signed-off-by: Richard Fitzgerald <rf@...nsource.cirrus.com>
> Signed-off-by: Stefan Binding <sbinding@...nsource.cirrus.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
> ---
> include/sound/cs42l42.h | 5 +++++
> sound/soc/codecs/cs42l42.c | 2 ++
> 2 files changed, 7 insertions(+)
>
> diff --git a/include/sound/cs42l42.h b/include/sound/cs42l42.h
> index 1d1c24fdd0cae..3994e933db195 100644
> --- a/include/sound/cs42l42.h
> +++ b/include/sound/cs42l42.h
> @@ -34,6 +34,7 @@
> #define CS42L42_PAGE_24 0x2400
> #define CS42L42_PAGE_25 0x2500
> #define CS42L42_PAGE_26 0x2600
> +#define CS42L42_PAGE_27 0x2700
> #define CS42L42_PAGE_28 0x2800
> #define CS42L42_PAGE_29 0x2900
> #define CS42L42_PAGE_2A 0x2A00
> @@ -720,6 +721,10 @@
>
> #define CS42L42_SRC_SDOUT_FS (CS42L42_PAGE_26 + 0x09)
>
> +/* Page 0x27 DMA */
> +#define CS42L42_SOFT_RESET_REBOOT (CS42L42_PAGE_27 + 0x01)
> +#define CS42L42_SFT_RST_REBOOT_MASK BIT(1)
> +
> /* Page 0x28 S/PDIF Registers */
> #define CS42L42_SPDIF_CTL1 (CS42L42_PAGE_28 + 0x01)
> #define CS42L42_SPDIF_CTL2 (CS42L42_PAGE_28 + 0x02)
> diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
> index 2fefbcf7bd130..82aa11d6937be 100644
> --- a/sound/soc/codecs/cs42l42.c
> +++ b/sound/soc/codecs/cs42l42.c
> @@ -293,6 +293,7 @@ bool cs42l42_readable_register(struct device *dev, unsigned int reg)
> case CS42L42_SPDIF_SW_CTL1:
> case CS42L42_SRC_SDIN_FS:
> case CS42L42_SRC_SDOUT_FS:
> + case CS42L42_SOFT_RESET_REBOOT:
> case CS42L42_SPDIF_CTL1:
> case CS42L42_SPDIF_CTL2:
> case CS42L42_SPDIF_CTL3:
> @@ -358,6 +359,7 @@ bool cs42l42_volatile_register(struct device *dev, unsigned int reg)
> case CS42L42_LOAD_DET_DONE:
> case CS42L42_DET_STATUS1:
> case CS42L42_DET_STATUS2:
> + case CS42L42_SOFT_RESET_REBOOT:
> return true;
> default:
> return false;
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