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Message-ID: <20230131084508.32b80a1b@bootlin.com>
Date: Tue, 31 Jan 2023 08:45:08 +0100
From: Herve Codina <herve.codina@...tlin.com>
To: Rob Herring <robh@...nel.org>
Cc: Li Yang <leoyang.li@....com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Christophe Leroy <christophe.leroy@...roup.eu>,
Michael Ellerman <mpe@...erman.id.au>,
Nicholas Piggin <npiggin@...il.com>,
Qiang Zhao <qiang.zhao@....com>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Shengjiu Wang <shengjiu.wang@...il.com>,
Xiubo Li <Xiubo.Lee@...il.com>,
Fabio Estevam <festevam@...il.com>,
Nicolin Chen <nicoleotsuka@...il.com>,
linuxppc-dev@...ts.ozlabs.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, alsa-devel@...a-project.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v4 05/10] dt-bindings: soc: fsl: cpm_qe: Add QMC
controller
Hi Rob,
On Mon, 30 Jan 2023 12:30:37 -0600
Rob Herring <robh@...nel.org> wrote:
> On Thu, Jan 26, 2023 at 09:32:17AM +0100, Herve Codina wrote:
> > Add support for the QMC (QUICC Multichannel Controller)
> > available in some PowerQUICC SoC such as MPC885 or MPC866.
> >
> > Signed-off-by: Herve Codina <herve.codina@...tlin.com>
> > ---
> > .../bindings/soc/fsl/cpm_qe/fsl,qmc.yaml | 167 ++++++++++++++++++
>
> fsl,cpm1-scc-qmc.yaml
Ok, will be changed in the next iteration.
>
> > 1 file changed, 167 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml
> > new file mode 100644
> > index 000000000000..9141a8ca183b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml
> > @@ -0,0 +1,167 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qmc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
> > +
> > +maintainers:
> > + - Herve Codina <herve.codina@...tlin.com>
> > +
> > +description:
> > + The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
> > + serial controller using the same TDM physical interface routed from TSA.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - enum:
> > + - fsl,mpc885-scc-qmc
> > + - fsl,mpc866-scc-qmc
> > + - const: fsl,cpm1-scc-qmc
> > +
> > + reg:
> > + items:
> > + - description: SCC (Serial communication controller) register base
> > + - description: SCC parameter ram base
> > + - description: Dual port ram base
> > +
> > + reg-names:
> > + items:
> > + - const: scc_regs
> > + - const: scc_pram
> > + - const: dpram
> > +
> > + interrupts:
> > + maxItems: 1
> > + description: SCC interrupt line in the CPM interrupt controller
> > +
> > + fsl,tsa-serial:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + items:
> > + - items:
> > + - description: phandle to TSA node
> > + - enum: [1, 2, 3]
> > + description: |
> > + TSA serial interface (dt-bindings/soc/fsl,tsa.h defines these
> > + values)
> > + - 1: SCC2
> > + - 2: SCC3
> > + - 3: SCC4
> > + description:
> > + Should be a phandle/number pair. The phandle to TSA node and the TSA
> > + serial interface to use.
> > +
> > + '#address-cells':
> > + const: 1
> > +
> > + '#size-cells':
> > + const: 0
> > +
> > + '#chan-cells':
> > + const: 1
>
> What's this?
A QMC consumer, such as "QMC audio" in this series, can have a phandle with
an argument that points to this QMC node. For instance, in the "QMC audio"
node, we have:
fsl,qmc-chan = <&qmc 16>;
The #chan-cells property in TSA specify the presence of this argument.
What do you think if I add the following description:
'#chan-cells':
const: 1
description:
QMC consumers that use a phandle to QMC need to pass the channel
number with this phandle.
For instance "fsl,qmc-chan = <&qmc 16>;".
>
> > +
> > +patternProperties:
> > + '^channel@([0-9]|[1-5][0-9]|6[0-3])$':
> > + description:
> > + A channel managed by this controller
> > + type: object
> > +
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 63
> > + description:
> > + The channel number
> > +
> > + fsl,operational-mode:
> > + $ref: /schemas/types.yaml#/definitions/string
> > + enum: [transparent, hdlc]
> > + default: transparent
> > + description: |
> > + The channel operational mode
> > + - hdlc: The channel handles HDLC frames
> > + - transparent: The channel handles raw data without any processing
> > +
> > + fsl,reverse-data:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description:
> > + The bit order as seen on the channels is reversed,
> > + transmitting/receiving the MSB of each octet first.
> > + This flag is used only in 'transparent' mode.
> > +
> > + fsl,tx-ts-mask:
> > + $ref: /schemas/types.yaml#/definitions/uint64
> > + description:
> > + Channel assigned Tx time-slots within the Tx time-slots routed by the
> > + TSA to this cell.
> > +
> > + fsl,rx-ts-mask:
> > + $ref: /schemas/types.yaml#/definitions/uint64
> > + description:
> > + Channel assigned Rx time-slots within the Rx time-slots routed by the
> > + TSA to this cell.
> > +
> > + required:
> > + - reg
> > + - fsl,tx-ts-mask
> > + - fsl,rx-ts-mask
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - fsl,tsa-serial
> > + - '#address-cells'
> > + - '#size-cells'
> > + - '#chan-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/soc/fsl,tsa.h>
> > +
> > + qmc@a60 {
> > + compatible = "fsl,mpc885-scc-qmc", "fsl,cpm1-scc-qmc";
> > + reg = <0xa60 0x20>,
> > + <0x3f00 0xc0>,
> > + <0x2000 0x1000>;
> > + reg-names = "scc_regs", "scc_pram", "dpram";
> > + interrupts = <27>;
> > + interrupt-parent = <&CPM_PIC>;
> > +
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + #chan-cells = <1>;
> > +
> > + fsl,tsa-serial = <&tsa FSL_CPM_TSA_SCC4>;
> > +
> > + channel@16 {
> > + /* Ch16 : First 4 even TS from all routed from TSA */
> > + reg = <16>;
> > + fsl,mode = "transparent";
> > + fsl,reverse-data;
> > + fsl,tx-ts-mask = <0x00000000 0x000000aa>;
> > + fsl,rx-ts-mask = <0x00000000 0x000000aa>;
> > + };
> > +
> > + channel@17 {
> > + /* Ch17 : First 4 odd TS from all routed from TSA */
> > + reg = <17>;
> > + fsl,mode = "transparent";
> > + fsl,reverse-data;
> > + fsl,tx-ts-mask = <0x00000000 0x00000055>;
> > + fsl,rx-ts-mask = <0x00000000 0x00000055>;
> > + };
> > +
> > + channel@19 {
> > + /* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
> > + reg = <19>;
> > + fsl,mode = "hdlc";
> > + fsl,tx-ts-mask = <0x00000000 0x0000ff00>;
> > + fsl,rx-ts-mask = <0x00000000 0x0000ff00>;
> > + };
> > + };
> > --
> > 2.39.0
> >
Thanks for the review,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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