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Message-ID: <8e11a80c-8056-e226-e051-c01b82f29d05@linaro.org>
Date:   Tue, 31 Jan 2023 13:37:59 +0100
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        linux-arm-msm@...r.kernel.org, andersson@...nel.org,
        agross@...nel.org, krzysztof.kozlowski@...aro.org
Cc:     marijn.suijten@...ainline.org,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 4/8] clk: qcom: Add GPU clock controller driver for
 SM6125



On 31.01.2023 10:00, Dmitry Baryshkov wrote:
> On 31/01/2023 01:59, Konrad Dybcio wrote:
>> Add support for the GPU clock controller found on SM6125.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>> ---
[...]

>> +    /* Set recommended WAKEUP/SLEEP settings for the gpu_cc_cx_gmu_clk */
>> +    regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, CBCR_WAKEUP, 0xf);
>> +    regmap_update_bits(regmap, gpu_cc_cx_gmu_clk.clkr.enable_reg, CBCR_SLEEP, 0xf);
> 
> I think you have to use FIELD_PREP here. regmap_update_bits doesn't shift the value according to the mask, does it?
> 
You're right.

Konrad
>> +
>> +    qcom_branch_set_force_mem_core(regmap, gpu_cc_gx_gfx3d_clk.halt_reg, true);
>> +    qcom_branch_set_force_periph_on(regmap, gpu_cc_gx_gfx3d_clk.halt_reg, true);
>> +
>> +    return qcom_cc_really_probe(pdev, &gpu_cc_sm6125_desc, regmap);
>> +}
>> +
>> +static struct platform_driver gpu_cc_sm6125_driver = {
>> +    .probe = gpu_cc_sm6125_probe,
>> +    .driver = {
>> +        .name = "gpucc-sm6125",
>> +        .of_match_table = gpu_cc_sm6125_match_table,
>> +    },
>> +};
>> +module_platform_driver(gpu_cc_sm6125_driver);
>> +
>> +MODULE_DESCRIPTION("QTI GPUCC SM6125 Driver");
>> +MODULE_LICENSE("GPL");
> 

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