lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <3d9ba55f-68fb-3643-9ab5-dacb903a5996@gmail.com>
Date:   Tue, 31 Jan 2023 14:22:02 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Roger Lu <roger.lu@...iatek.com>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        Kevin Hilman <khilman@...nel.org>,
        Nicolas Boichat <drinkcat@...gle.com>
Cc:     Fan Chen <fan.chen@...iatek.com>,
        Jia-wei Chang <jia-wei.chang@...iatek.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v4 01/14] soc: mediatek: mtk-svs: restore default voltages
 when svs_init02() fail



On 11/01/2023 08:45, Roger Lu wrote:
> If svs init02 fail, it means we cannot rely on svs bank voltages anymore.
> We need to disable svs function and restore DVFS opp voltages back to the
> default voltages for making sure we have enough DVFS voltages.
> 
> Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine")
> Fixes: 0bbb09b2af9d ("soc: mediatek: SVS: add mt8192 SVS GPU driver")
> Signed-off-by: Roger Lu <roger.lu@...iatek.com>

Applied, thanks!

> ---
>   drivers/soc/mediatek/mtk-svs.c | 24 ++++++++++++++++++++++--
>   1 file changed, 22 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c
> index 0469c9dfeb04..2df30a6bca28 100644
> --- a/drivers/soc/mediatek/mtk-svs.c
> +++ b/drivers/soc/mediatek/mtk-svs.c
> @@ -1461,6 +1461,7 @@ static int svs_init02(struct svs_platform *svsp)
>   {
>   	struct svs_bank *svsb;
>   	unsigned long flags, time_left;
> +	int ret;
>   	u32 idx;
>   
>   	for (idx = 0; idx < svsp->bank_max; idx++) {
> @@ -1479,7 +1480,8 @@ static int svs_init02(struct svs_platform *svsp)
>   							msecs_to_jiffies(5000));
>   		if (!time_left) {
>   			dev_err(svsb->dev, "init02 completion timeout\n");
> -			return -EBUSY;
> +			ret = -EBUSY;
> +			goto out_of_init02;
>   		}
>   	}
>   
> @@ -1497,12 +1499,30 @@ static int svs_init02(struct svs_platform *svsp)
>   		if (svsb->type == SVSB_HIGH || svsb->type == SVSB_LOW) {
>   			if (svs_sync_bank_volts_from_opp(svsb)) {
>   				dev_err(svsb->dev, "sync volt fail\n");
> -				return -EPERM;
> +				ret = -EPERM;
> +				goto out_of_init02;
>   			}
>   		}
>   	}
>   
>   	return 0;
> +
> +out_of_init02:
> +	for (idx = 0; idx < svsp->bank_max; idx++) {
> +		svsb = &svsp->banks[idx];
> +
> +		spin_lock_irqsave(&svs_lock, flags);
> +		svsp->pbank = svsb;
> +		svs_switch_bank(svsp);
> +		svs_writel_relaxed(svsp, SVSB_PTPEN_OFF, SVSEN);
> +		svs_writel_relaxed(svsp, SVSB_INTSTS_VAL_CLEAN, INTSTS);
> +		spin_unlock_irqrestore(&svs_lock, flags);
> +
> +		svsb->phase = SVSB_PHASE_ERROR;
> +		svs_adjust_pm_opp_volts(svsb);
> +	}
> +
> +	return ret;
>   }
>   
>   static void svs_mon_mode(struct svs_platform *svsp)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ