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Message-ID: <CACPK8Xf2=uAo-03+q2A5ZOdYoHrdgs6viskxk6QncvXOgtxh_A@mail.gmail.com>
Date: Wed, 1 Feb 2023 04:32:13 +0000
From: Joel Stanley <joel@....id.au>
To: Jonathan Neuschäfer <j.neuschaefer@....net>
Cc: openbmc@...ts.ozlabs.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: wpcm450: Add nuvoton,shm = <&shm> to FIU node
On Sun, 29 Jan 2023 at 11:26, Jonathan Neuschäfer <j.neuschaefer@....net> wrote:
>
> The Flash Interface Unit (FIU) should have a reference to the Shared
> Memory controller (SHM) so that flash access from the host (x86 computer
> managed by the WPCM450 BMC) can be blocked during flash access by the
> FIU driver.
>
> Fixes: 38abcb0d68767 ("ARM: dts: wpcm450: Add FIU SPI controller node")
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
Reviewed-by: Joel Stanley <joel@....id.au>
I'll send this to the soc maintainers.
> ---
> arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
> index 299fcbba3089b..fda2f13093f98 100644
> --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
> +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
> @@ -478,6 +478,7 @@ fiu: spi-controller@...00000 {
> reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
> reg-names = "control", "memory";
> clocks = <&clk WPCM450_CLK_FIU>;
> + nuvoton,shm = <&shm>;
> status = "disabled";
> };
>
> --
> 2.39.0
>
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