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Message-ID: <039986bb-a3e0-2482-9853-30532df10ff8@linaro.org>
Date: Wed, 1 Feb 2023 10:57:16 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Brad Larson <blarson@....com>, robh@...nel.org
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Subject: Re: [PATCH v8 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD
Pensando Elba System Resource chip
On 30/01/2023 20:12, Brad Larson wrote:
> Hi Rob,
>
> On Wednesday, November 16, 2022 2:30 PM, Rob Herring wrote:
>> On Wed, Nov 16, 2022 at 11:39:40AM -0800, Brad Larson wrote:
>>> Add support for the AMD Pensando Elba SoC System Resource chip
>>> using the SPI interface.
>>
>> Please resend the whole series properly threaded.
>
> Series sent as v9
>
>>> +description: |
>>> + AMD Pensando Elba SoC Resource Controller functions are
>>> + accessed with four chip-selects. Reset control is on CS0.
>>
>> One device with 4 chip-selects? Then I'd expect 'reg = <0 1 2 3>;'
>>
>> Hard to say more because I don't have the whole thread nor remember what
>> exactly we discussed before. That was 100s of bindings ago...
>
> This has been changed to one device and four chip selects. This binding error
> is occuring for snps,dw-apb-ssi.yaml using reg for the chip selects. Any
> guidance on how to fix?
>
> $ make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> LINT Documentation/devicetree/bindings
> CHKDT Documentation/devicetree/bindings/processed-schema.json
> SCHEMA Documentation/devicetree/bindings/processed-schema.json
> DTC_CHK arch/arm64/boot/dts/amd/elba-asic.dtb
> /home/brad/linux.v10/arch/arm64/boot/dts/amd/elba-asic.dtb: spi@...0: system-controller@0:reg: [[0], [1], [2], [3]] is too long
> From schema: /home/brad/linux.v10/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
Maybe this would work in snps,dw-apb-ssi for children:
reg:
items:
minimum: 0
maximum: 3
Best regards,
Krzysztof
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