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Message-Id: <20230203081807.2248625-10-abel.vesa@linaro.org>
Date: Fri, 3 Feb 2023 10:18:04 +0200
From: Abel Vesa <abel.vesa@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
"vkoul@...nel.org" <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Johan Hovold <johan+linaro@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v7 09/12] dt-bindings: PCI: qcom: Add SM8550 compatible
Add the SM8550 platform to the binding.
Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
This patchset relies on the following patchset:
https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/
The v6 of this patch is:
https://lore.kernel.org/all/20230202123902.3831491-10-abel.vesa@linaro.org/
Changes since v6:
* none
Changes since v5:
* added Krzysztof's R-b tag
Changes since v4:
* dropped _serdes infix from ln_shrd table name and from every ln_shrd
variable name
* added hyphen between "no CSR" in both places
* dropped has_ln_shrd_serdes_tbl
* reordered qmp_pcie_offsets_v6_20 by struct members
* added rollback for no-CSR reset in qmp_pcie_init fail path
* moved ln_shrd offset calculation after port_b
* dropped the minItems for interconnects
* made iommu related properties global
* renamed noc_aggr_4 back to noc_aggr
Changes since v3:
* renamed noc_aggr to noc_aggr_4, as found in the driver
Changes since v2:
* dropped the pipe from clock-names
* removed the pcie instance number from aggre clock-names comment
* renamed aggre clock-names to noc_aggr
* dropped the _pcie infix from cnoc_pcie_sf_axi
* renamed pcie_1_link_down_reset to simply link_down
* added enable-gpios back, since pcie1 node will use it
Changes since v1:
* Switched to single compatible for both PCIes (qcom,pcie-sm8550)
* dropped enable-gpios property
* dropped interconnects related properties, the power-domains
* properties
and resets related properties the sm8550 specific allOf:if:then
* dropped pipe_mux, phy_pipe and ref clocks from the sm8550 specific
allOf:if:then clock-names array and decreased the minItems and
maxItems for clocks property accordingly
* added "minItems: 1" to interconnects, since sm8550 pcie uses just one,
same for interconnect-names
.../devicetree/bindings/pci/qcom,pcie.yaml | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 872817d6d2bd..9f1bdbc4b0fd 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -38,6 +38,7 @@ properties:
- qcom,pcie-sm8350
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
+ - qcom,pcie-sm8550
- items:
- const: qcom,pcie-msm8996
- const: qcom,pcie-msm8998
@@ -58,6 +59,12 @@ properties:
minItems: 1
maxItems: 8
+ iommus:
+ maxItems: 1
+
+ iommu-map:
+ maxItems: 2
+
# Common definitions for clocks, clock-names and reset.
# Platform constraints are described later.
clocks:
@@ -108,6 +115,10 @@ properties:
power-domains:
maxItems: 1
+ enable-gpios:
+ description: GPIO controlled connection to ENABLE# signal
+ maxItems: 1
+
perst-gpios:
description: GPIO controlled connection to PERST# signal
maxItems: 1
@@ -205,6 +216,7 @@ allOf:
- qcom,pcie-sm8350
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
+ - qcom,pcie-sm8550
then:
properties:
reg:
@@ -639,6 +651,37 @@ allOf:
items:
- const: pci # PCIe core reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-sm8550
+ then:
+ properties:
+ clocks:
+ minItems: 7
+ maxItems: 8
+ clock-names:
+ minItems: 7
+ items:
+ - const: aux # Auxiliary clock
+ - const: cfg # Configuration clock
+ - const: bus_master # Master AXI clock
+ - const: bus_slave # Slave AXI clock
+ - const: slave_q2a # Slave Q2A clock
+ - const: ddrss_sf_tbu # PCIe SF TBU clock
+ - const: noc_aggr # Aggre NoC PCIe AXI clock
+ - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
+ resets:
+ minItems: 1
+ maxItems: 2
+ reset-names:
+ minItems: 1
+ items:
+ - const: pci # PCIe core reset
+ - const: link_down # PCIe link down reset
+
- if:
properties:
compatible:
@@ -724,6 +767,7 @@ allOf:
- qcom,pcie-sm8350
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
+ - qcom,pcie-sm8550
then:
oneOf:
- properties:
--
2.34.1
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