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Message-ID: <afe28108-9b85-982c-90ee-8cd58c9b6fb2@starfivetech.com>
Date: Fri, 3 Feb 2023 17:23:47 +0800
From: William Qiu <william.qiu@...rfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-mmc@...r.kernel.org>
CC: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Jaehoon Chung <jh80.chung@...sung.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 3/3] riscv: dts: starfive: Add mmc node
On 2023/2/3 17:02, Krzysztof Kozlowski wrote:
> On 03/02/2023 09:19, William Qiu wrote:
>> This adds the mmc node for the StarFive JH7110 SoC.
>
> Do not use "This xxx". Use imperative mode.
> https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
>
>> Set mmco node to emmc and set mmc1 node to sd.
>>
>> Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
>
>
>> +
>> &gmac0_rmii_refin {
>> clock-frequency = <50000000>;
>> };
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index 64d260ea1f29..ae1a664e7af5 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -370,6 +370,11 @@ syscrg: clock-controller@...20000 {
>> #reset-cells = <1>;
>> };
>>
>> + sysreg: syscon@...30000 {
>> + compatible = "starfive,sysreg", "syscon";
>
> No:
> 1. Undocumented.
> 2. A bit too generic. You should have here SoC specific compatible as
> well (either as second or third compatible, if all your SoCs share
> register layout).
>
Hi Krzysztof,
As for the compatible, I will change it to "starfive,jh7110-sysreg"
in next version,but for undocumented, I don't get it, can you
clarify that.
Thank you anyway.
Best regards,
William Qiu
>> + reg = <0x0 0x13030000 0x0 0x1000>;
>> + };
>> +
>
> Best regards,
> Krzysztof
>
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