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Message-Id: <20230203164854.390080-4-krzysztof.kozlowski@linaro.org>
Date: Fri, 3 Feb 2023 17:48:53 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH 4/5] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: correct gpio-ranges
The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number
of GPIOs in gpio-ranges.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
.../bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
index 9a3f1fb8c2f7..200b3b6ccd87 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml
@@ -134,7 +134,7 @@ examples:
clock-names = "core", "audio";
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&lpi_tlmm 0 0 18>;
+ gpio-ranges = <&lpi_tlmm 0 0 19>;
dmic01-state {
dmic01-clk-pins {
--
2.34.1
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