lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAHp75VcVn2=Xy7P4xgiDKkpOkw+YD1zGwMYARpWV6Eiv0fUakw@mail.gmail.com>
Date:   Mon, 6 Feb 2023 22:59:47 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Horatiu Vultur <horatiu.vultur@...rochip.com>
Cc:     linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        linus.walleij@...aro.org, alexandre.belloni@...tlin.com
Subject: Re: [PATCH] pinctrl: ocelot: Fix alt mode for ocelot

On Mon, Feb 6, 2023 at 10:37 PM Horatiu Vultur
<horatiu.vultur@...rochip.com> wrote:
>
> In case the driver was trying to set an alternate mode for gpio
> 0 or 32 then the mode was not set correctly. The reason is that
> there is computation error inside the function ocelot_pinmux_set_mux
> because in this case it was trying to shift to left by -1.
> Fix this by actually shifting the function bits and not the position.
>
> Fixes: 4b36082e2e09 ("pinctrl: ocelot: fix pinmuxing for pins after 31")
> Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>

...

>         regmap_update_bits(info->map, REG_ALT(0, info, pin->pin),
>                            BIT(p), f << p);
>         regmap_update_bits(info->map, REG_ALT(1, info, pin->pin),
> -                          BIT(p), f << (p - 1));
> +                          BIT(p), (f >> 1) << p);

I'm not sure I understand how this doesn't break anything that has a
bit 0 set in f. Is it not a problem?

-- 
With Best Regards,
Andy Shevchenko

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ